[Intel-gfx] [PATCH 15/37] drm/i915: add S PLL control
Rodrigo Vivi
rodrigo.vivi at gmail.com
Mon Mar 26 19:41:27 CEST 2012
* indentation
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
On Wed, Mar 21, 2012 at 10:09 PM, Eugeni Dodonov
<eugeni.dodonov at intel.com> wrote:
> This PLL control can drive DDI ports at desired frequencies for
> DisplayPort and FDI connections.
>
> Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 9ff9856..e38dafc 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -3963,4 +3963,12 @@
> #define PIXCLK_GATE_UNGATE 1<<0
> #define PIXCLK_GATE_GATE 0<<0
>
> +/* SPLL */
> +#define SPLL_CTL 0x46020
> +#define SPLL_PLL_ENABLE (1<<31)
> +#define SPLL_PLL_SCC (1<<28)
> +#define SPLL_PLL_NON_SCC (2<<28)
> +#define SPLL_PLL_FREQ_810MHz (0<<26)
> +#define SPLL_PLL_FREQ_1350MHz (1<<26)
> +
> #endif /* _I915_REG_H_ */
> --
> 1.7.9.2
>
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--
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
GPG: 0x905BE242 @ wwwkeys.pgp.net
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