[Intel-gfx] [PATCH 19/37] drm/i915: add LCPLL control registers

Daniel Vetter daniel at ffwll.ch
Mon Mar 26 19:46:55 CEST 2012


On Mon, Mar 26, 2012 at 02:42:30PM -0300, Rodrigo Vivi wrote:
>  LCPLL_PLL_ENABLE should be  (0<<31)\

I that case I think we should name it LCPLL_PLL_DISABLE (and use (1<<31)
obviously).
-Daniel

> 
> Otherwise
> 
> Reviewed-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
> 
> On Wed, Mar 21, 2012 at 10:09 PM, Eugeni Dodonov
> <eugeni.dodonov at intel.com> wrote:
> > Those are used to control the display core clock.
> >
> > Signed-off-by: Eugeni Dodonov <eugeni.dodonov at intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_reg.h |    7 +++++++
> >  1 file changed, 7 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> > index 03fb10d..fa9e3a8 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4014,4 +4014,11 @@
> >  #define GTCCLK_EN                              0xC6030
> >  #define  GTCCLK_EN_ENABLE              (1<<0)
> >
> > +/* LCPLL Control */
> > +#define LCPLL_CTL                              0x130040
> > +#define  LCPLL_PLL_ENABLE              (1<<31)
> > +#define  LCPLL_PLL_LOCK                        (1<<30)
> > +#define  LCPLL_CD_CLOCK_DISABLE        (1<<25)
> > +#define  LCPLL_CD2X_CLOCK_DISABLE      (1<<23)
> > +
> >  #endif /* _I915_REG_H_ */
> > --
> > 1.7.9.2
> >
> > _______________________________________________
> > Intel-gfx mailing list
> > Intel-gfx at lists.freedesktop.org
> > http://lists.freedesktop.org/mailman/listinfo/intel-gfx
> 
> 
> 
> -- 
> Rodrigo Vivi
> Blog: http://blog.vivi.eng.br
> GPG: 0x905BE242 @ wwwkeys.pgp.net
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48



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