[Intel-gfx] [PATCH 2/3] drm/i915: extract intel_enable_rc6()
ben at bwidawsk.net
Thu Mar 29 02:30:10 CEST 2012
On Sun, 25 Mar 2012 14:10:59 +0200
Daniel Vetter <daniel at ffwll.ch> wrote:
> On Sat, Mar 24, 2012 at 07:09:45PM -0700, Ben Widawsky wrote:
> > nice to have elsewhere
> > CC: Eugeni Dodonov <eugeni.dodonov at intel.com>
> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> I was momentarily confused with this commit message, until I've
> noticed that you need this in the next patch (I've assumed Eugeni
> needs to for something). So please slightly elaborate on the reasons
> for this.
> Also I've wondered whether we shouldn't filter the individual rc6
> levels? Or are all counters sane once you enable at least one of the
> rc6 levels? -Daniel
The only insane counter is rc6 (p and pp work as I would expect). Rc6
seems to always have some random value in it. Eugeni's theory is the
BIOS initializes RC6 always, and that's where that value comes from.
The register is read only, unfortunately.
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