[Intel-gfx] [PATCH] drm/i915: Sanitize BIOS debugging bits from PIPECONF

Chris Wilson chris at chris-wilson.co.uk
Fri Mar 30 18:15:08 CEST 2012

On Thu, 22 Mar 2012 15:00:50 +0000, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> Quoting the BSpec from time immemorial:
>   PIPEACONF, bits 28:27: Frame Start Delay (Debug)
>   Used to delay the frame start signal that is sent to the display planes.
>   Care must be taken to insure that there are enough lines during VBLANK
>   to support this setting.
> An instance of the BIOS leaving these bits set was found in the wild,
> where it caused our modesetting to go all squiffy and skewiff.
> References: https://bugs.freedesktop.org/show_bug.cgi?id=47271
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> Cc: stable at kernel.org

Reported-and-tested-by: Carl Richell <carl at system76.com>
Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=43012

Chris Wilson, Intel Open Source Technology Centre

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