[Intel-gfx] [PATCH 09/18] drm/i915: possibly invalidate TLB before context switch
ben at bwidawsk.net
Fri Mar 30 20:39:53 CEST 2012
On Thu, 29 Mar 2012 21:25:49 +0200
Daniel Vetter <daniel at ffwll.ch> wrote:
> On Sun, Mar 18, 2012 at 01:39:49PM -0700, Ben Widawsky wrote:
> > From http://intellinuxgraphics.org/documentation/SNB/IHD_OS_Vol1_Part3.pdf
> > [DevSNB] If Flush TLB invalidation Mode is enabled it’s the driver’s
> > responsibility to invalidate the TLBs at least once after the previous
> > context switch after any GTT mappings changed (including new GTT
> > entries). This can be done by a pipelined PIPE_CONTROL with TLB inv bit
> > set immediately before MI_SET_CONTEXT.
> > Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
> Hm, I've beend decently confused about the meaning of
> GFX_TLB_INVALIDATE_ALWAYS - it actually means that we flush tlbs on every
> full flush (i.e. always) when it's reset. And we don't set this so this
> workaround is pretty much just informational. I'm hence wondering whether
> a big comment wouldn't be better?
It's probably not much difference in terms of LOC with the plus that the
"comment" turns into correctly functioning code if we flip the bit.
Just from a quick glance at code though, it seems we don't explicitly
touch this bit for GEN6. Which was probably why I did it in the first
Anyway, I really don't care enough to argue, but I like the way it is,
and it's been tested the way it is; call the ball.
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