[Intel-gfx] [PATCH] drm/i915: Wait for the clocks to stabilise before updating PLLs
Daniel Vetter
daniel at ffwll.ch
Thu May 3 11:13:15 CEST 2012
On Wed, May 02, 2012 at 09:26:36PM +0100, Chris Wilson wrote:
> On Wed, 2 May 2012 13:14:59 -0700, Ben Widawsky <ben at bwidawsk.net> wrote:
> > On Wed, 2 May 2012 20:43:56 +0100
> > Chris Wilson <chris at chris-wilson.co.uk> wrote:
>
> When initialising the PLL registers we may have to clear existing state
> from the BIOS - that is the PLL may already be enabled. So we need to
> disable it, wait for the clocks to settle and then rewrite it.
>
> The issue came to light when Ben tested
>
> commit 88ca4bb7974277793e602d88739d4e8f56b89e64
> Author: Jesse Barnes <jbarnes at virtuousgeek.org>
> Date: Fri Apr 20 17:11:53 2012 +0100
>
> drm/i915: manage PCH PLLs separately from pipes
>
> and found that booting into a VGA monitor was no longer working. Closer
> inspection suggests that it was a pre-existing bug now being hit by the
> rearranged code. Perhaps Ben was not even the first person to stumble
> upon this bug, https://bugs.freedesktop.org/show_bug.cgi?id=37029.
>
> Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
> > > Cc: Ben Widawsky <ben at bwidawsk.net>
> > > Cc: Jesse Barnes <jbarnes at virtuousgeek.org>
> > Reported-and-tested-by: Ben Widawsky <ben at bwidawsk.net>
Queued for -next, thanks for the patch.
-Daniel
--
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48
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