[Intel-gfx] [PATCH 04/14] drm/i915: touch the DIP control register after enabling the HDMI port

[Daniel Vetter]

On Fri, May 04, 2012 at 05:18:16PM -0300, Paulo Zanoni wrote:
> From: Paulo Zanoni <paulo.r.zanoni at intel.com>
> 
> This is not documented anywhere, but it seems necessary to make the
> InfoFrames work, especially when all you have is an HDMI monitor.
> 
> Some bugs get fixed just by running "./intel_infoframes -d". This
> patch fixes this problem on my machine.
> 
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>

Can you elaborate a bit on which machines really need this? I fear that
we're adding a hack here which is only required on a few chips and then
keep it around forever ...
-Daniel
> ---
>  drivers/gpu/drm/i915/intel_hdmi.c |   22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
> index 1eef50d..8646a50 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -113,6 +113,20 @@ static u32 intel_infoframe_flags(struct dip_infoframe *frame)
>  	return flags;
>  }
>  
> +static u32 intel_get_dip_ctl_reg(struct drm_encoder *encoder)
> +{
> +	struct drm_device *dev = encoder->dev;
> +	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
> +
> +	if (!HAS_PCH_SPLIT(dev)) {
> +		return VIDEO_DIP_CTL;
> +	} else if (IS_VALLEYVIEW(dev)) {
> +		return VLV_TVIDEO_DIP_CTL(intel_crtc->pipe);
> +	} else {
> +		return TVIDEO_DIP_CTL(intel_crtc->pipe);
> +	}
> +}
> +
>  static void i9xx_write_infoframe(struct drm_encoder *encoder,
>  				 struct dip_infoframe *frame)
>  {
> @@ -331,6 +345,14 @@ static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
>  		I915_WRITE(intel_hdmi->sdvox_reg, temp);
>  		POSTING_READ(intel_hdmi->sdvox_reg);
>  	}
> +
> +	if ((mode == DRM_MODE_DPMS_ON) && encoder->crtc) {
> +		/* We've just enabled the HDMI port. Now we need to touch the
> +		 * DIP control register to make sure the infoframes are sent.
> +		 */
> +		u32 dip_reg = intel_get_dip_ctl_reg(encoder);
> +		I915_WRITE(dip_reg, I915_READ(dip_reg));
> +	}
>  }
>  
>  static int intel_hdmi_mode_valid(struct drm_connector *connector,
> -- 
> 1.7.10
> 
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-- 
Daniel Vetter
Mail: daniel at ffwll.ch
Mobile: +41 (0)79 365 57 48