[Intel-gfx] [PATCH] drm/i915: Only check for valid PP_{ON, OFF}_DELAYS on pre ILK hardware

Daniel Vetter daniel at ffwll.ch
Thu Nov 1 17:24:49 CET 2012


On Thu, Nov 1, 2012 at 4:52 PM, Paulo Zanoni <przanoni at gmail.com> wrote:
> The only problem is: we're not doing anything here for the
> HAS_PCH_SPLIT platforms. Shouldn't we be doing something? We do have
> eDP code to set the PCH_PP registers, but not LVDS code for this.
> Also, each encoder probably needs different values.
>
> So my suggestion would be: apply this patch (since it fixes a problem)
> and then, in the future, maybe, move this code to the encoder-specific
> callbacks, and also consider the HAS_PCH_SPLIT + LVDS case.

It's even worse than that: This code is also run on ums setups, so
potentially we could break some old setups here ...
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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