[Intel-gfx] [PATCH 1/5] drm/i915: make edp panel power sequence setup more robust

[Jesse Barnes]

On Tue, 23 Oct 2012 09:23:00 +0200
Daniel Vetter <daniel.vetter at ffwll.ch> wrote:

> On Tue, Oct 23, 2012 at 12:04 AM, Jesse Barnes <jbarnes at virtuousgeek.org> wrote:
> > If the current field is not zero and doesn't match the VBT, we might
> > add a debug statement.  It could indicate a BIOS programmed value that
> > didn't involve a VBT update (I can imagine some vendors might do
> > this).  Overwriting the current with the different VBT value may lead
> > to breakage or sub-optimal timings.
> 
> We dump the current values (read out from the PP regs), the vbt values
> and now also the new values we write back into the regs. That not good
> enough?

I suppose, it just means more digging if there's a mismatch.

-- 
Jesse Barnes, Intel Open Source Technology Center