[Intel-gfx] [PATCH] drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpaths
Mika Kuoppala
mika.kuoppala at linux.intel.com
Mon Oct 29 15:59:26 CET 2012
Make intel_render_ring_init_dri and intel_init_ring_buffer symmetrical
with regards of workaround introduced by:
commit 27c1cbd06a7620b354cbb363834f3bb8df4f410d
Author: Chris Wilson <chris at chris-wilson.co.uk>
Date: Mon Apr 9 13:59:46 2012 +0100
drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g
Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 785df4f..b13393b 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -1590,7 +1590,7 @@ int intel_render_ring_init_dri(struct drm_device *dev, u64 start, u32 size)
ring->size = size;
ring->effective_size = ring->size;
- if (IS_I830(ring->dev))
+ if (IS_I830(ring->dev) || IS_845G(ring->dev))
ring->effective_size -= 128;
ring->virtual_start = ioremap_wc(start, size);
--
1.7.9.5
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