[Intel-gfx] [PATCH] drm/i915/ringbuffer: exclude last 2 cachelines on 845g on all callpaths

[Daniel Vetter]

On Mon, Oct 29, 2012 at 04:59:26PM +0200, Mika Kuoppala wrote:
> Make intel_render_ring_init_dri and intel_init_ring_buffer symmetrical
> with regards of workaround introduced by:
> 
> commit 27c1cbd06a7620b354cbb363834f3bb8df4f410d
> Author: Chris Wilson <chris at chris-wilson.co.uk>
> Date:   Mon Apr 9 13:59:46 2012 +0100
> 
>     drm/i915/ringbuffer: Exclude last 2 cachlines of ring on 845g
> 
> Signed-off-by: Mika Kuoppala <mika.kuoppala at intel.com>
Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch