[Intel-gfx] [PATCH 13/36] drm/i915: remove an useless indentation level on hsw_fdi_link_train

[Paulo Zanoni]

From: Paulo Zanoni <paulo.r.zanoni at intel.com>

We already "break" when the link training succeeds.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/intel_ddi.c | 27 +++++++++++----------------
 1 file changed, 11 insertions(+), 16 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 11b5809..3e43e42 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -228,26 +228,21 @@ void hsw_fdi_link_train(struct drm_crtc *crtc)
 						DP_TP_CTL_ENABLE);
 
 			break;
-		} else {
-			DRM_ERROR("Error training BUF_CTL %d\n", i);
+		}
 
-			/* Disable DP_TP_CTL and FDI_RX_CTL) and retry */
-			I915_WRITE(DP_TP_CTL(PORT_E),
-					I915_READ(DP_TP_CTL(PORT_E)) &
-						~DP_TP_CTL_ENABLE);
+		DRM_ERROR("Error training BUF_CTL %d\n", i);
 
-			rx_ctl_val &= ~FDI_RX_PLL_ENABLE;
-			I915_WRITE(_FDI_RXA_CTL, rx_ctl_val);
+		/* Disable DP_TP_CTL and FDI_RX_CTL) and retry */
+		I915_WRITE(DP_TP_CTL(PORT_E),
+			   I915_READ(DP_TP_CTL(PORT_E)) & ~DP_TP_CTL_ENABLE);
 
-			temp = I915_READ(_FDI_RXA_MISC);
-			temp &= ~(FDI_RX_PWRDN_LANE1_MASK |
-				  FDI_RX_PWRDN_LANE0_MASK);
-			temp |= FDI_RX_PWRDN_LANE1_VAL(2) |
-				FDI_RX_PWRDN_LANE0_VAL(2);
-			I915_WRITE(_FDI_RXA_MISC, temp);
+		rx_ctl_val &= ~FDI_RX_PLL_ENABLE;
+		I915_WRITE(_FDI_RXA_CTL, rx_ctl_val);
 
-			continue;
-		}
+		temp = I915_READ(_FDI_RXA_MISC);
+		temp &= ~(FDI_RX_PWRDN_LANE1_MASK | FDI_RX_PWRDN_LANE0_MASK);
+		temp |= FDI_RX_PWRDN_LANE1_VAL(2) | FDI_RX_PWRDN_LANE0_VAL(2);
+		I915_WRITE(_FDI_RXA_MISC, temp);
 	}
 
 	DRM_DEBUG_KMS("FDI train done.\n");
-- 
1.7.11.4