[Intel-gfx] [PATCH] drm/i915: Don't override PPGTT cacheability on HSW

[Kenneth Graunke]

On 04/03/2013 11:06 AM, Ben Widawsky wrote:
> Apparently these ECOCHK bits changed on HSW and the behavior is not what
> we want. I've not been able to find VLV definition specifically so I'll
> assume it's the same as IVB.
>
> (Only compile tested)
>
> Reported-by: Kenneth Graunke <kenneth at whitecape.org>
> Signed-off-by: Ben Widawsky <ben at bwidawsk.net>

The behavior isn't particularly bad, but the PTEs already take care of 
this for us, so it doesn't do anything.  That said, having random 
override bits set for no purpose is bad...we should just let the PTEs do 
their job.

Reviewed-and-tested-by: Kenneth Graunke <kenneth at whitecape.org>

Thanks Ben!