[Intel-gfx] [PATCH] drm/i915: fix EDID/sink-based bpp clamping

[Daniel Vetter]

On Sun, Jun 2, 2013 at 12:09 PM, Chris Wilson <chris at chris-wilson.co.uk> wrote:
> On Sat, Jun 01, 2013 at 11:53:23PM +0200, Daniel Vetter wrote:
>> Since this is run in the compute config stage we need to check
>> the new_ pointers, not the current modeset layout. Also there
>> was a little logic bug in properly skipping connectors. This has
>> been broken when moving the pipe bpp selection in
>>
>> commit 4e53c2e010e531b4a014692199e978482d471c7e
>> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
>> Date:   Wed Mar 27 00:44:58 2013 +0100
>>
>>     drm/i915: precompute pipe bpp before touching the hw
>>
>> To avoid too much casting switch from drm_ to intel_ types.
>>
>> Also add a bit of debug output to help reconstructing what's going
>> on.
>>
>> v2: Try to clarify this a bit:
>> - s/pipe_config_set_bpp/compute_baseline_pipe_bpp/ to make it clearer
>>   at which stage this function is run. Also add a comment about what
>>   it does.
>> - Extract the sink clamping into it's own function.
>>
>> v3: Actually make it compile.
>>
>> Cc: Chris Wilson <chris at chris-wilson.co.uk>
>> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
>
> It reads easier than the first (just now hides the bug fix ;-). I'm
> still worried that the confusion between connector->display_info and
> connector->base.display_info is far too easy to mistake. Can you
> describe succinctly the difference between the two, and ideally capture
> that in a new name for the intel_connector->display_info?

The newly-added base is just due to the drm_connector->intel_connector
switch. So I seem to have indeed burried the actual bugfix completely
:(

I'll split the refactoring into a prep patch and resend.
-Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch