[Intel-gfx] [PATCH 4/6] drm/i915: initialize the Haswell SRD interrupts

[Paulo Zanoni]

From: Paulo Zanoni <paulo.r.zanoni at intel.com>

Same reasons as the other ones: we're not using them so we don't want
them, and this is a preparation for when we enable package C8+ states.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni at intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 11 ++++++++++-
 drivers/gpu/drm/i915/i915_reg.h |  3 +++
 2 files changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 33f404e..c21055e 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2548,11 +2548,14 @@ static void ivybridge_irq_preinstall(struct drm_device *dev)
 	I915_WRITE(GEN6_PMIER, 0x0);
 	POSTING_READ(GEN6_PMIER);
 
-	/* Audio */
+	/* Audio and PSR */
 	if (IS_HASWELL(dev)) {
 		I915_WRITE(AUDIMR, 0xffffffff);
 		I915_WRITE(AUDIER, 0x0);
 		POSTING_READ(AUDIER);
+
+		I915_WRITE(SRDIMR, 0xffffffff);
+		POSTING_READ(SRDIMR);
 	}
 
 	ibx_irq_preinstall(dev);
@@ -2758,6 +2761,9 @@ static int ivybridge_irq_postinstall(struct drm_device *dev)
 	if (IS_HASWELL(dev)) {
 		I915_WRITE(AUDIIR, I915_READ(AUDIIR));
 		POSTING_READ(AUDIIR);
+
+		I915_WRITE(SRDIIR, I915_READ(SRDIIR));
+		POSTING_READ(SRDIIR);
 	}
 
 	ibx_irq_postinstall(dev);
@@ -2872,6 +2878,9 @@ static void ironlake_irq_uninstall(struct drm_device *dev)
 		I915_WRITE(AUDIMR, 0xffffffff);
 		I915_WRITE(AUDIER, 0x0);
 		I915_WRITE(AUDIIR, I915_READ(AUDIIR));
+
+		I915_WRITE(SRDIMR, 0xffffffff);
+		I915_WRITE(SRDIIR, I915_READ(SRDIIR));
 	}
 
 	if (HAS_PCH_NOP(dev))
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index d7f272a..f996e9f 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3737,6 +3737,9 @@
 #define AUDIIR	0x44088
 #define AUDIER	0x4408c
 
+#define SRDIMR	0x64834
+#define SRDIIR	0x64838
+
 #define ILK_DISPLAY_CHICKEN2	0x42004
 /* Required on all Ironlake and Sandybridge according to the B-Spec. */
 #define  ILK_ELPIN_409_SELECT	(1 << 25)
-- 
1.8.1.2