[Intel-gfx] [PATCH 08/10] drm/i915: Don't try to calculate RC6 residency on GEN4 and before
Daniel Vetter
daniel at ffwll.ch
Tue Jun 11 23:03:40 CEST 2013
On Tue, Jun 11, 2013 at 04:33:24PM -0300, Paulo Zanoni wrote:
> 2013/6/7 Damien Lespiau <damien.lespiau at intel.com>:
> > intel_enable_rc6() is used to check if we can compute the RC6 residency
> > in the sysfs code. Disable this for platforms older than Ironlake.
> >
> > Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
> > ---
> > drivers/gpu/drm/i915/intel_pm.c | 4 ++++
> > 1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> > index 2eb1846..0465cd6 100644
> > --- a/drivers/gpu/drm/i915/intel_pm.c
> > +++ b/drivers/gpu/drm/i915/intel_pm.c
> > @@ -3154,6 +3154,10 @@ static void valleyview_disable_rps(struct drm_device *dev)
> >
> > int intel_enable_rc6(const struct drm_device *dev)
> > {
> > + /* No RC6 before Ironlake */
> > + if (INTEL_INFO(dev)->gen < 5)
> > + return 0;
>
> Daniel recently complained about a similar check on one of my patches.
> Looks like the preferred way would be "if (INTEL_INFO(dev)->gen <=
> 4)". I guess Daniel can do this change while applying the patch.
Actually that way round is imo ok, since we tend to say pre-gen5 and mean
that it excludes gen5. It's kinda like iterating over 0-based C arrays
where you check i >= start && i < end ;-)
Cheers, Daniel
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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