[Intel-gfx] [PATCH] drm/i915: backlight combination mode bit is gen4 only

[Ville Syrjälä]

On Tue, Sep 24, 2013 at 04:44:39PM +0300, Jani Nikula wrote:
> Not valid for later non-PCH split platforms such as VLV.
> 
> Signed-off-by: Jani Nikula <jani.nikula at intel.com>

The bit is mbz on VLV, so I guess it should be 0, but better safe than
sorry, and it gets rid of a useless register read.

Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_panel.c |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/drm/i915/intel_panel.c
> index 3bc89a6..8f025c6 100644
> --- a/drivers/gpu/drm/i915/intel_panel.c
> +++ b/drivers/gpu/drm/i915/intel_panel.c
> @@ -329,7 +329,7 @@ static int is_backlight_combination_mode(struct drm_device *dev)
>  {
>  	struct drm_i915_private *dev_priv = dev->dev_private;
>  
> -	if (INTEL_INFO(dev)->gen >= 4)
> +	if (IS_GEN4(dev))
>  		return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
>  
>  	if (IS_GEN2(dev))
> -- 
> 1.7.10.4
> 
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-- 
Ville Syrjälä
Intel OTC