[Intel-gfx] [PATCH] drm/i915: backlight combination mode bit is gen4 only

[Daniel Vetter]

On Tue, Sep 24, 2013 at 05:41:21PM +0300, Ville Syrjälä wrote:
> On Tue, Sep 24, 2013 at 04:44:39PM +0300, Jani Nikula wrote:
> > Not valid for later non-PCH split platforms such as VLV.
> > 
> > Signed-off-by: Jani Nikula <jani.nikula at intel.com>
> 
> The bit is mbz on VLV, so I guess it should be 0, but better safe than
> sorry, and it gets rid of a useless register read.
> 
> Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

Queued for -next, thanks for the patch.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch