[Intel-gfx] [PATCH] drm/i915/vlv: untangle integrated clock source handling

Daniel Vetter daniel at ffwll.ch
Fri Sep 27 22:02:35 CEST 2013


On Fri, Sep 27, 2013 at 12:22:11PM -0700, Jesse Barnes wrote:
> The global integrated clock source bit resides in DPLL B on VLV, but we
> were treating it as a per-pipe resource.  It needs to be set whenever
> any PLL is active, so pull setting the bit out of vlv_update_pll and
> into vlv_enable_pll.  Also add a vlv_disable_pll to prevent disabling it
> when pipe B shuts down.
> 
> I'm guessing on the references here, I expect this to bite any config
> where multiple displays are active or displays are moved from pipe to
> pipe.
> 
> References: https://bugs.freedesktop.org/show_bug.cgi?id=67245
> References: https://bugs.freedesktop.org/show_bug.cgi?id=69693
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/intel_display.c | 27 ++++++++++++++++++++++++---
>  1 file changed, 24 insertions(+), 3 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 0eeba84..def2473 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -1386,6 +1386,13 @@ static void vlv_enable_pll(struct intel_crtc *crtc)
>  	if (IS_MOBILE(dev_priv->dev) && !IS_I830(dev_priv->dev))
>  		assert_panel_unlocked(dev_priv, crtc->pipe);
>  
> +	/* Make sure to use the integrated clock source */
> +	if (!crtc->pipe)

I prefer explicit pipe != PIPE_B checks. We have a bunch of those already
in vlv code, and every time I read one of them my parser trips. Treating
enums as booleans is imo just evil ;-)
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch



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