[Intel-gfx] [PATCH 5/5] drm/i915: Displayport - Add function to execute a single iteration of channel equalization

[Todd Previte]

Adds a function to execute a single iteration of the channel equalization
sequence for Displayport. This is functionality required to establish more
fine-grained control over the Displayport interface, both for operational
reliability and compliance testing.

Signed-off-by: Todd Previte <tprevite at gmail.com>
---
 drivers/gpu/drm/i915/intel_dp.c | 31 +++++++++++++++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 6baa26c..66dbda6 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2878,6 +2878,37 @@ exit:
 	return clock_recovery_status;
 }
 
+uint32_t intel_dp_exec_channel_equalization(struct intel_dp *intel_dp)
+{
+	uint32_t channel_equalization_status = DP_CHANNEL_EQUALIZATION_FAILED;
+	uint8_t link_status[DP_LINK_STATUS_SIZE];
+
+	// Set the correct training pattern
+	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12)
+		intel_dp_set_training_pattern(DP_TRAINING_PATTERN_2, intel_dp); 
+	else
+		intel_dp_set_training_pattern(DP_TRAINING_PATTERN_2, intel_dp); 
+
+	// Wait for channel equalization time period to expire
+	drm_dp_link_train_channel_eq_delay(intel_dp->dpcd);
+
+	// Check link status
+	if (!intel_dp_get_link_status(intel_dp, link_status)) {
+		channel_equalization_status = DP_LINK_STATUS_READ_FAILED;
+		goto exit;
+	}
+
+	// Verify that both CR is still valid and CE is successful
+	if (intel_dp_verify_link_status(DP_LINK_TRAINING_STATE_CLOCK_REC,
+									intel_dp->lane_count, link_status) &&
+		intel_dp_verify_link_status(DP_LINK_TRAINING_STATE_CHANNEL_EQ,
+									intel_dp->lane_count, link_status))
+			channel_equalization_status = DP_CHANNEL_EQUALIZATION_COMPLETE;
+
+exit:
+	return channel_equalization_status;
+}
+
 static void
 intel_dp_link_down(struct intel_dp *intel_dp)
 {
-- 
1.8.3.2