[Intel-gfx] [PATCH 4/5] drm/i915: Displayport - Add function for executing a single iteration of clock recovery

[Todd Previte]

Adds a function to execute a single iteration of the clock recovery
sequence for Displayport. This is functionality required to establish
more fine-grained control over the Displayport interface, both for
operational reliability and compliance testing.

Signed-off-by: Todd Previte <tprevite at gmail.com>
---
 drivers/gpu/drm/i915/i915_reg.h |  6 ++++++
 drivers/gpu/drm/i915/intel_dp.c | 30 +++++++++++++++++++++++++++++-
 2 files changed, 35 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0f0d549..eebc4f2 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -5304,6 +5304,12 @@ enum punit_power_well {
 #define  DP_TP_CTL_SCRAMBLE_DISABLE		(1<<7)
 
 #define DP_TRAINING_PATTERN_MASK_1P2	0x7
+#define DP_CLOCK_RECOVERY_COMPLETE  		0x0
+#define DP_CLOCK_RECOVERY_FAILED			0x1
+#define DP_LINK_STATUS_READ_FAILED  		0x2
+#define DP_CHANNEL_EQUALIZATION_COMPLETE	0x0
+#define DP_CHANNEL_EQUALIZATION_FAILED  	0x1
+#define DP_SYMBOL_LOCK_FAILED				0x1
 
 /* DisplayPort Transport Status */
 #define DP_TP_STATUS_A			0x64044
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 1209de8..6baa26c 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2466,7 +2466,7 @@ intel_dp_set_training_pattern(uint8_t training_pattern,
 	reg_value = I915_READ(ctrl_reg);
 
 	// Check DPCD revision to enable TP3
-	if (intel_dp->dpcd[0] >= 12)
+	if (intel_dp->dpcd[DP_DPCD_REV] >= 0x12)
 		tp_mask = DP_TRAINING_PATTERN_MASK_1P2;
 
 	// Mask selection above ensures TP3 does not get enabled for < DP 1.2
@@ -2850,6 +2850,34 @@ void intel_dp_stop_link_train(struct intel_dp *intel_dp)
 				DP_TRAINING_PATTERN_DISABLE);
 }
 
+// State-based link training functions
+// FIXME: Remove these comments before commit!
+uint32_t intel_dp_exec_clock_recovery(struct intel_dp *intel_dp)
+{
+	uint32_t clock_recovery_status = DP_CLOCK_RECOVERY_FAILED;
+	uint8_t link_status[DP_LINK_STATUS_SIZE];
+
+	// Set the training pattern for clock recovery
+	intel_dp_set_training_pattern(DP_TRAINING_PATTERN_1, intel_dp);
+
+	// Wait for clock recovery time period to expire
+	drm_dp_link_train_clock_recovery_delay(intel_dp->dpcd);
+
+	// Check link status
+	if (!intel_dp_get_link_status(intel_dp, link_status)) {
+		clock_recovery_status = DP_LINK_STATUS_READ_FAILED;
+		goto exit;
+	}
+
+	// Verify clock recovery is successful
+	if (intel_dp_verify_link_status(DP_LINK_TRAINING_STATE_CLOCK_REC,
+									intel_dp->lane_count, link_status))
+		clock_recovery_status = DP_CLOCK_RECOVERY_COMPLETE;
+
+exit:
+	return clock_recovery_status;
+}
+
 static void
 intel_dp_link_down(struct intel_dp *intel_dp)
 {
-- 
1.8.3.2