[Intel-gfx] [PATCH 1/3] drm/i915: Invalidate media caches on gen7
Chris Wilson
chris at chris-wilson.co.uk
Fri Dec 12 01:23:28 PST 2014
On Thu, Dec 11, 2014 at 02:24:53PM +0200, Ville Syrjälä wrote:
> On Thu, Dec 11, 2014 at 08:16:59AM +0000, Chris Wilson wrote:
> > In the gen7 pipe control there is an extra bit to flush the media
> > caches, so let's set it during cache invalidation flushes.
>
> Bspec is telling me this bit is already present in snb, and calls it
> 'Generic Media State Clear'. Older Bspec seems to suggest we should set
> it here, and maybe that we should also issue another PIPE_CONTROL with
> the bit set after MI_SET_CONTEXT when switching from media to 3D context.
> These notes don't seem to be present in the current BSpec, so I'm not
> sure what the deal is.
In an alternative universe, I do the barrier + context switch first, invalidate
later. However, there is also a benefit to doing the invalidate before
context switch as bspec talks about not reloading invalidated indirect
state. Not sure if that ever applies to us though.
-Chris
--
Chris Wilson, Intel Open Source Technology Centre
More information about the Intel-gfx
mailing list