[Intel-gfx] [PATCH 04/13] drm/i915: Make semaphore updates more precise
Ville Syrjälä
ville.syrjala at linux.intel.com
Tue Feb 11 18:13:52 CET 2014
On Tue, Feb 11, 2014 at 08:08:27AM -0800, Ben Widawsky wrote:
> On Thu, Jan 30, 2014 at 01:25:42PM +0200, Ville Syrjälä wrote:
> > On Wed, Jan 29, 2014 at 11:55:24AM -0800, Ben Widawsky wrote:
> diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
> index 97789ff..3bec0f5 100644
> --- a/drivers/gpu/drm/i915/intel_ringbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
> @@ -635,18 +635,18 @@ static void render_ring_cleanup(struct intel_ring_buffer *ring)
> static int gen6_signal(struct intel_ring_buffer *signaller,
> unsigned int num_dwords)
> {
> -#define MBOX_UPDATE_DWORDS 4
> +#define MBOX_UPDATE_DWORDS 3
> struct drm_device *dev = signaller->dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_ring_buffer *useless;
> int i, ret, num_rings;
>
> num_rings = hweight_long(INTEL_INFO(dev)->ring_mask);
> - num_dwords = round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2);
> + num_dwords += round_up((num_rings-1) * MBOX_UPDATE_DWORDS, 2);
> #undef MBOX_UPDATE_DWORDS
>
> /* XXX: + 4 for the caller */
> - ret = intel_ring_begin(signaller, num_dwords + 4);
> + ret = intel_ring_begin(signaller, num_dwords);
> if (ret)
> return ret;
>
> @@ -656,7 +656,6 @@ static int gen6_signal(struct intel_ring_buffer *signaller,
> intel_ring_emit(signaller, MI_LOAD_REGISTER_IMM(1));
> intel_ring_emit(signaller, mbox_reg);
> intel_ring_emit(signaller, signaller->outstanding_lazy_seqno);
> - intel_ring_emit(signaller, MI_NOOP);
> }
> }
Still need to emit an extra MI_NOOP if num_dwords got rounded.
>
> @@ -1877,9 +1876,10 @@ int intel_init_render_ring_buffer(struct drm_device *dev)
> ring->irq_enable_mask = GT_RENDER_USER_INTERRUPT;
> ring->get_seqno = gen6_ring_get_seqno;
> ring->set_seqno = ring_set_seqno;
> - ring->semaphore.sync_to = gen6_ring_sync;
> - if (i915_semaphore_is_enabled(dev))
> + if (i915_semaphore_is_enabled(dev)) {
> + ring->semaphore.sync_to = gen6_ring_sync;
> ring->semaphore.signal = gen6_signal;
> + }
> ring->semaphore.mbox[RCS] = MI_SEMAPHORE_SYNC_INVALID;
> ring->semaphore.mbox[VCS] = MI_SEMAPHORE_SYNC_RV;
> ring->semaphore.mbox[BCS] = MI_SEMAPHORE_SYNC_RB;
--
Ville Syrjälä
Intel OTC
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