[Intel-gfx] [PATCH 13/19] drm/i915: factor out reset_vblank_counter

[Ville Syrjälä]

On Tue, Feb 18, 2014 at 12:02:14AM +0200, Imre Deak wrote:
> We need to do the same for other platforms in upcoming patches.
> 
> Signed-off-by: Imre Deak <imre.deak at intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 14 ++++++++++----
>  1 file changed, 10 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 9cb7ed6..e81e7de 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -5249,11 +5249,19 @@ static void hsw_power_well_post_enable(struct drm_i915_private *dev_priv)
>  	}
>  }
>  
> +static void reset_vblank_counter(struct drm_device *dev, enum pipe p)

Could just call the parameter 'pipe' while we're at it.

> +{
> +	unsigned long irqflags;
> +
> +	spin_lock_irqsave(&dev->vbl_lock, irqflags);
> +	dev->vblank[p].last = 0;
> +	spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
> +}
> +
>  static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv)
>  {
>  	struct drm_device *dev = dev_priv->dev;
>  	enum pipe p;
> -	unsigned long irqflags;
>  
>  	/*
>  	 * After this, the registers on the pipes that are part of the power
> @@ -5262,11 +5270,9 @@ static void hsw_power_well_post_disable(struct drm_i915_private *dev_priv)
>  	 *
>  	 * FIXME: Should we do this in general in drm_vblank_post_modeset?
>  	 */
> -	spin_lock_irqsave(&dev->vbl_lock, irqflags);
>  	for_each_pipe(p)
>  		if (p != PIPE_A)
> -			dev->vblank[p].last = 0;
> -	spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
> +			reset_vblank_counter(dev, p);
>  }
>  
>  static void hsw_set_power_well(struct drm_i915_private *dev_priv,
> -- 
> 1.8.4
> 
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-- 
Ville Syrjälä
Intel OTC