[Intel-gfx] [PATCH 1/2] drm/i915: make sure south port interrupts are enabled properly

[Paulo Zanoni]

2014/1/10 Jesse Barnes <jbarnes at virtuousgeek.org>:
> We were apparently relying on the defaults on BDW, which resulted in no
> hotplug or AUX interrupts.
>
> References: https://bugs.freedesktop.org/show_bug.cgi?id=72834
> References: https://bugs.freedesktop.org/show_bug.cgi?id=72833
> Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index 261254a..f88e265 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -2763,13 +2763,15 @@ static void ibx_irq_postinstall(struct drm_device *dev)
>                 mask = SDE_GMBUS | SDE_AUX_MASK | SDE_TRANSB_FIFO_UNDER |
>                        SDE_TRANSA_FIFO_UNDER | SDE_POISON;
>         } else {
> -               mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT | SDE_ERROR_CPT;
> +               mask = SDE_GMBUS_CPT | SDE_AUX_MASK_CPT | SDE_ERROR_CPT |
> +                       SDE_HOTPLUG_MASK_CPT;
>
>                 I915_WRITE(SERR_INT, I915_READ(SERR_INT));
>         }
>
>         I915_WRITE(SDEIIR, I915_READ(SDEIIR));
>         I915_WRITE(SDEIMR, ~mask);
> +       I915_WRITE(SDEIER, mask);

ibx_irq_preinstall contains a nice comment explaining why SDEIER needs
to be 0xffffffff.

I think the proper solution to your bug is probably to call
ibx_irq_preinstall from gen8_irq_preinstall.

>  }
>
>  static void gen5_gt_irq_postinstall(struct drm_device *dev)
> --
> 1.8.3.2
>
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-- 
Paulo Zanoni