[Intel-gfx] [PATCH] drm/i915/bdw: MU_FLUSH_DW a qword instead of dword

[Daniel Vetter]

On Wed, Mar 05, 2014 at 09:24:34AM +0000, Chris Wilson wrote:
> On Tue, Mar 04, 2014 at 09:38:56AM -0800, Ben Widawsky wrote:
> > The actual post sync op is "Write Immediate Data QWord." It is therefore
> > arguable that we should have always done a qword write.
> 
> Not really since the spec explicitly says that we can choose either a
> dword or qword write. Note that qword writes also currently require a
> 64 byte alignment.

Yeah, that's also my reading of the spec - the lenght field selects
whether the hw does a qword or dword write, and the qword needs to be
specially aligned.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch