[Intel-gfx] [PATCH] drm/i915/bdw: MU_FLUSH_DW a qword instead of dword

Ben Widawsky benjamin.widawsky at intel.com
Wed Mar 5 20:05:15 CET 2014

On Wed, Mar 05, 2014 at 07:33:11PM +0100, Daniel Vetter wrote:
> On Wed, Mar 05, 2014 at 09:24:34AM +0000, Chris Wilson wrote:
> > On Tue, Mar 04, 2014 at 09:38:56AM -0800, Ben Widawsky wrote:
> > > The actual post sync op is "Write Immediate Data QWord." It is therefore
> > > arguable that we should have always done a qword write.
> > 
> > Not really since the spec explicitly says that we can choose either a
> > dword or qword write. Note that qword writes also currently require a
> > 64 byte alignment.
> Yeah, that's also my reading of the spec - the lenght field selects
> whether the hw does a qword or dword write, and the qword needs to be
> specially aligned.
> -Daniel

I think both of you only read this sentence, where I said it was
"arguable." The rest of the commit message was what actually mattered.

Ben Widawsky, Intel Open Source Technology Center

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