[Intel-gfx] [PATCH 40/49] drm/i915/bdw: Write the tail pointer, LRC style

[oscar.mateo at intel.com]

From: Oscar Mateo <oscar.mateo at intel.com>

Writing the tail pointer for the context ringbuffer is quite similar to
the legacy ringbuffers. The primary difference is that each context has
the ringbuffer pointers in the context object.

Signed-off-by: Oscar Mateo <oscar.mateo at intel.com>
---
 drivers/gpu/drm/i915/i915_lrc.c | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_lrc.c b/drivers/gpu/drm/i915/i915_lrc.c
index 9984a54..e564bac 100644
--- a/drivers/gpu/drm/i915/i915_lrc.c
+++ b/drivers/gpu/drm/i915/i915_lrc.c
@@ -172,6 +172,19 @@ static void submit_execlist(struct intel_engine *ring,
 	gen6_gt_force_wake_put(dev_priv, FORCEWAKE_ALL);
 }
 
+static void gen8_write_tail_ctx(struct i915_hw_context *ctx, u32 value)
+{
+	struct page *page;
+	uint32_t *reg_state;
+
+	page = i915_gem_object_get_page(ctx->obj, 1);
+	reg_state = kmap_atomic(page);
+
+	reg_state[CTX_RING_TAIL+1] = value;
+
+	kunmap_atomic(reg_state);
+}
+
 static int gen8_write_pdp_ctx(struct i915_hw_context *ctx,
 				   struct i915_hw_ppgtt *ppgtt)
 {
@@ -205,12 +218,14 @@ static int gen8_switch_context(struct intel_engine *ring,
 
 	ppgtt = ctx_to_ppgtt(to0);
 	gen8_write_pdp_ctx(to0, ppgtt);
+	gen8_write_tail_ctx(to0, tail0);
 
 	if (to1) {
 		BUG_ON(!i915_gem_obj_is_pinned(to1->obj));
 
 		ppgtt = ctx_to_ppgtt(to1);
 		gen8_write_pdp_ctx(to1, ppgtt);
+		gen8_write_tail_ctx(to1, tail1);
 	}
 
 	submit_execlist(ring, to0, to1);
-- 
1.9.0