[Intel-gfx] [PATCH 42/56] TESTME: Either drop the last patch or fix it.
Ben Widawsky
benjamin.widawsky at intel.com
Sat May 10 05:59:37 CEST 2014
I was getting unexplainable hangs with the last patch, even though I
think it should be correct. As the subject says, should this ever get
merged, it needs to be coordinated with the patch this reverts.
Revert "drm/i915/bdw: Optimize PDP loads"
This reverts commit 64053129b5cbd3a5f87dab27d026c17efbdf0387.
---
drivers/gpu/drm/i915/i915_gem_gtt.c | 20 --------------------
drivers/gpu/drm/i915/i915_gem_gtt.h | 1 -
2 files changed, 21 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 3ea0c7d..d8bb4dc 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -438,20 +438,8 @@ static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
struct intel_ring_buffer *ring,
bool synchronous)
{
- struct drm_i915_private *dev_priv = ring->dev->dev_private;
int i, ret;
- /* The RCS ring gets reloaded by the hardware context state. So we only
- * need to actually reload if one of the page directory pointer have
- * changed, or it's !RCS
- *
- * Aliasing PPGTT remains special, as we do not track it's
- * reloading needs.
- */
- if (ppgtt != dev_priv->mm.aliasing_ppgtt &&
- ring->id == RCS && !ppgtt->pdp.needs_reload)
- return 0;
-
for (i = GEN8_LEGACY_PDPES - 1; i >= 0; i--) {
struct i915_pagedir *pd = ppgtt->pdp.pagedirs[i];
dma_addr_t addr = pd ? pd->daddr : ppgtt->scratch_pt->daddr;
@@ -462,9 +450,6 @@ static int gen8_mm_switch(struct i915_hw_ppgtt *ppgtt,
return ret;
}
-
- ppgtt->pdp.needs_reload = 0;
-
return 0;
}
@@ -666,7 +651,6 @@ static void gen8_teardown_va_range(struct i915_address_space *vm,
free_pd_single(pd, vm->dev);
ppgtt->pdp.pagedirs[pdpe] = NULL;
WARN_ON(!test_and_clear_bit(pdpe, ppgtt->pdp.used_pdpes));
- ppgtt->pdp.needs_reload = 1;
}
}
}
@@ -917,8 +901,6 @@ static int gen8_alloc_va_range(struct i915_address_space *vm,
}
set_bit(pdpe, ppgtt->pdp.used_pdpes);
- if (test_and_set_bit(pdpe, ppgtt->pdp.used_pdpes))
- ppgtt->pdp.needs_reload = 1;
gen8_map_pagetable_range(pd, start, length, ppgtt->base.dev);
}
@@ -955,8 +937,6 @@ static int gen8_ppgtt_init_common(struct i915_hw_ppgtt *ppgtt, uint64_t size)
ppgtt->switch_mm = gen8_mm_switch;
ppgtt->base.insert_entries = gen8_ppgtt_insert_entries;
- ppgtt->pdp.needs_reload = 1;
-
ppgtt->scratch_pd = alloc_pt_scratch(ppgtt->base.dev);
if (IS_ERR(ppgtt->scratch_pd))
return PTR_ERR(ppgtt->scratch_pd);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index dd561f3..b3d0776 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -198,7 +198,6 @@ struct i915_pagedirpo {
/* struct page *page; */
DECLARE_BITMAP(used_pdpes, GEN8_LEGACY_PDPES);
struct i915_pagedir *pagedirs[GEN8_LEGACY_PDPES];
- unsigned needs_reload:1;
};
struct i915_address_space {
--
1.9.2
More information about the Intel-gfx
mailing list