[Intel-gfx] [PATCH 43/56] drm/i915/bdw: Add dynamic page trace events

[Ben Widawsky]

This works the same as GEN6.

I was disappointed that I need to pass vm around now, but it's not so
much uglier than the drm_device, and having the vm in trace events is
hugely important.

v2: Consolidate pagetable/pagedirectory events

Signed-off-by: Ben Widawsky <ben at bwidawsk.net>
---
 drivers/gpu/drm/i915/i915_gem_gtt.c | 41 ++++++++++++++++++++++++++++---------
 drivers/gpu/drm/i915/i915_trace.h   | 16 +++++++++++++++
 2 files changed, 47 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index d8bb4dc..4d01d4e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -558,19 +558,24 @@ static void __gen8_do_map_pt(gen8_ppgtt_pde_t *pde,
 /* It's likely we'll map more than one pagetable at a time. This function will
  * save us unnecessary kmap calls, but do no more functionally than multiple
  * calls to map_pt. */
-static void gen8_map_pagetable_range(struct i915_pagedir *pd,
+static void gen8_map_pagetable_range(struct i915_address_space *vm,
+				     struct i915_pagedir *pd,
 				     uint64_t start,
-				     uint64_t length,
-				     struct drm_device *dev)
+				     uint64_t length)
 {
 	gen8_ppgtt_pde_t *pagedir = kmap_atomic(pd->page);
 	struct i915_pagetab *pt;
 	uint64_t temp, pde;
 
-	gen8_for_each_pde(pt, pd, start, length, temp, pde)
-		__gen8_do_map_pt(pagedir + pde, pt, dev);
+	gen8_for_each_pde(pt, pd, start, length, temp, pde) {
+		__gen8_do_map_pt(pagedir + pde, pt, vm->dev);
+		trace_i915_pagetable_map(vm, pde, pt,
+					 gen8_pte_index(start),
+					 gen8_pte_count(start, length),
+					 GEN8_PTES_PER_PT);
+	}
 
-	if (!HAS_LLC(dev))
+	if (!HAS_LLC(vm->dev))
 		drm_clflush_virt_range(pagedir, PAGE_SIZE);
 
 	kunmap_atomic(pagedir);
@@ -634,11 +639,20 @@ static void gen8_teardown_va_range(struct i915_address_space *vm,
 				     "PDE %d not reserved, but is allocated (%p)",
 				     pde, vm);
 
+			trace_i915_pagetable_unmap(vm, pde, pt,
+						   gen8_pte_index(pd_start),
+						   gen8_pte_count(pd_start, pd_len),
+						   GEN8_PTES_PER_PT);
+
 			bitmap_clear(pt->used_ptes,
 				     gen8_pte_index(pd_start),
 				     gen8_pte_count(pd_start, pd_len));
 
 			if (bitmap_empty(pt->used_ptes, GEN8_PTES_PER_PT)) {
+				trace_i915_pagetable_destroy(vm,
+							     pde,
+							     pd_start & GENMASK_ULL(64, GEN8_PDE_SHIFT),
+							     GEN8_PDE_SHIFT);
 				free_pt_single(pt, vm->dev);
 				/* This may be nixed later. Optimize? */
 				gen8_unmap_pagetable(ppgtt, pd, pde);
@@ -650,6 +664,9 @@ static void gen8_teardown_va_range(struct i915_address_space *vm,
 		if (bitmap_empty(pd->used_pdes, I915_PDES_PER_PD)) {
 			free_pd_single(pd, vm->dev);
 			ppgtt->pdp.pagedirs[pdpe] = NULL;
+			trace_i915_pagedirectory_destroy(vm, pdpe,
+							 start & GENMASK_ULL(64, GEN8_PDPE_SHIFT),
+							 GEN8_PDPE_SHIFT);
 			WARN_ON(!test_and_clear_bit(pdpe, ppgtt->pdp.used_pdpes));
 		}
 	}
@@ -698,6 +715,7 @@ static int gen8_ppgtt_alloc_pagetabs(struct i915_hw_ppgtt *ppgtt,
 				     uint64_t length,
 				     unsigned long *new_pts)
 {
+	struct drm_device *dev = ppgtt->base.dev;
 	struct i915_pagetab *unused;
 	uint64_t temp;
 	uint32_t pde;
@@ -706,19 +724,20 @@ static int gen8_ppgtt_alloc_pagetabs(struct i915_hw_ppgtt *ppgtt,
 		if (unused)
 			continue;
 
-		pd->page_tables[pde] = alloc_pt_single(ppgtt->base.dev);
+		pd->page_tables[pde] = alloc_pt_single(dev);
 
 		if (IS_ERR(pd->page_tables[pde]))
 			goto unwind_out;
 
 		set_bit(pde, new_pts);
+		trace_i915_pagetable_alloc(&ppgtt->base, pde, start, GEN8_PDE_SHIFT);
 	}
 
 	return 0;
 
 unwind_out:
 	for_each_set_bit(pde, new_pts, I915_PDES_PER_PD)
-		free_pt_single(pd->page_tables[pde], ppgtt->base.dev);
+		free_pt_single(pd->page_tables[pde], dev);
 
 	return -ENOMEM;
 }
@@ -772,6 +791,8 @@ static int gen8_ppgtt_alloc_pagedirs(struct i915_hw_ppgtt *ppgtt,
 
 		pdp->pagedirs[pdpe] = pd;
 		set_bit(pdpe, new_pds);
+		trace_i915_pagedirectory_alloc(&ppgtt->base, pdpe, start,
+					       GEN8_PDPE_SHIFT);
 	}
 
 	return 0;
@@ -902,7 +923,7 @@ static int gen8_alloc_va_range(struct i915_address_space *vm,
 
 		set_bit(pdpe, ppgtt->pdp.used_pdpes);
 
-		gen8_map_pagetable_range(pd, start, length, ppgtt->base.dev);
+		gen8_map_pagetable_range(vm, pd, start, length);
 	}
 
 	free_gen8_temp_bitmaps(new_page_dirs, new_page_tables);
@@ -964,7 +985,7 @@ static int gen8_aliasing_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
 	}
 
 	gen8_for_each_pdpe(pd, &ppgtt->pdp, start, size, temp, pdpe)
-		gen8_map_pagetable_range(pd, start, size, ppgtt->base.dev);
+		gen8_map_pagetable_range(&ppgtt->base, pd, start, size);
 
 	ppgtt->base.allocate_va_range = NULL;
 	ppgtt->base.teardown_va_range = NULL;
diff --git a/drivers/gpu/drm/i915/i915_trace.h b/drivers/gpu/drm/i915/i915_trace.h
index 99a436d..49f2389 100644
--- a/drivers/gpu/drm/i915/i915_trace.h
+++ b/drivers/gpu/drm/i915/i915_trace.h
@@ -217,6 +217,22 @@ DEFINE_EVENT(i915_pagetable, i915_pagetable_destroy,
 	     TP_ARGS(vm, pde, start, pde_shift)
 );
 
+DEFINE_EVENT_PRINT(i915_pagetable, i915_pagedirectory_alloc,
+		   TP_PROTO(struct i915_address_space *vm, u32 pdpe, u64 start, u64 pdpe_shift),
+		   TP_ARGS(vm, pdpe, start, pdpe_shift),
+
+		   TP_printk("vm=%p, pdpe=%d (0x%llx-0x%llx)",
+			     __entry->vm, __entry->pde, __entry->start, __entry->end)
+);
+
+DEFINE_EVENT_PRINT(i915_pagetable, i915_pagedirectory_destroy,
+		   TP_PROTO(struct i915_address_space *vm, u32 pdpe, u64 start, u64 pdpe_shift),
+		   TP_ARGS(vm, pdpe, start, pdpe_shift),
+
+		   TP_printk("vm=%p, pdpe=%d (0x%llx-0x%llx)",
+			     __entry->vm, __entry->pde, __entry->start, __entry->end)
+);
+
 /* Avoid extra math because we only support two sizes. The format is defined by
  * bitmap_scnprintf. Each 32 bits is 8 HEX digits followed by comma */
 #define TRACE_PT_SIZE(bits) \
-- 
1.9.2