[Intel-gfx] [PATCH] drm/i915: Support pf CRC source on haswell transcoder edp

[Daniel Vetter]

On Tue, May 27, 2014 at 06:37:20PM +0100, Damien Lespiau wrote:
> On Tue, May 27, 2014 at 10:12:07AM +0200, Daniel Vetter wrote:
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> > index 0542de982260..6d86820d350b 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++ b/drivers/gpu/drm/i915/intel_drv.h
> > @@ -327,6 +327,7 @@ struct intel_crtc_config {
> >  		u32 pos;
> >  		u32 size;
> >  		bool enabled;
> > +		bool disallow_bypass;
> >  	} pch_pfit;
> 
> (haven't tested anything or looked deeply into it, but...)
> 
> Having struggled with negative variables in the past, this one really
> looks awful. disallow *and* bypass. Can we just have 'force' or similar?

Yeah, double negatives ain't fun. But for this one here 'force' doesn't
seem clear either, since we don't force it. We simply need to have it not
bypassed, since the pipe CRC accidentally hangs in the same power well.

> As a side note, pch_pfit isn't really correct these days now (the pc_
> part).

We're full of historical accidents. I guess we could call it ilk_pfit or
so? Not sure about the naming here really. Agree though that pch is wrong
since the pfit isn't on the pch.

Aside: Ken tested -nightly quickly on his hsw laptop, and apparently it
works even without this patch. So I'm not sure we really need it, or what
exactly is broken ... Ville needs to dig this gem out first.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch