[Intel-gfx] [PATCH 3/5] drm/i915: Fix chv PCS DW11 register defines

[Jani Nikula]

On Thu, 16 Oct 2014, ville.syrjala at linux.intel.com wrote:
> From: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> I managed to fumble the per spline PCS DW11 register defines in:
>  commit 9d4f193b077c1973add53e40ff9410a3371900af

Looks like commit 570e2a747bc06cd8620662c5125ec2dc964c511b in my repo.

>  Author: Ville Syrjälä <ville.syrjala at linux.intel.com>
>  Date:   Thu Jun 26 13:47:19 2014 +0300
>
>     drm/i915: Clear TX FIFO reset master override bits on chv
>
> Fortunately the bit in DW0 that was cleared due to this didn't have
> any effect as long as the bit we meant to clear was already zero.

I did not have a spec handy, so I didn't check the regs, but clearly the
DW11 macro referencing other DW11 macros instead of DW0 makes sense.

Reviewed-by: Jani Nikula <jani.nikula at intel.com>


>
> Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/i915_reg.h | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 6db369a..46cfbc7 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -883,8 +883,8 @@ enum punit_power_well {
>  #define _VLV_PCS23_DW11_CH0		0x042c
>  #define _VLV_PCS01_DW11_CH1		0x262c
>  #define _VLV_PCS23_DW11_CH1		0x282c
> -#define VLV_PCS01_DW11(ch) _PORT(ch, _VLV_PCS01_DW0_CH0, _VLV_PCS01_DW0_CH1)
> -#define VLV_PCS23_DW11(ch) _PORT(ch, _VLV_PCS23_DW0_CH0, _VLV_PCS23_DW0_CH1)
> +#define VLV_PCS01_DW11(ch) _PORT(ch, _VLV_PCS01_DW11_CH0, _VLV_PCS01_DW11_CH1)
> +#define VLV_PCS23_DW11(ch) _PORT(ch, _VLV_PCS23_DW11_CH0, _VLV_PCS23_DW11_CH1)
>  
>  #define _VLV_PCS_DW12_CH0		0x8230
>  #define _VLV_PCS_DW12_CH1		0x8430
> -- 
> 2.0.4
>
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-- 
Jani Nikula, Intel Open Source Technology Center