[Intel-gfx] [PATCH 3/5] drm/i915: Fix chv PCS DW11 register defines

[Daniel Vetter]

On Fri, Oct 17, 2014 at 12:08:38PM +0300, Jani Nikula wrote:
> On Thu, 16 Oct 2014, ville.syrjala at linux.intel.com wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> > I managed to fumble the per spline PCS DW11 register defines in:
> >  commit 9d4f193b077c1973add53e40ff9410a3371900af
> 
> Looks like commit 570e2a747bc06cd8620662c5125ec2dc964c511b in my repo.

Fixed.
> 
> >  Author: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >  Date:   Thu Jun 26 13:47:19 2014 +0300
> >
> >     drm/i915: Clear TX FIFO reset master override bits on chv
> >
> > Fortunately the bit in DW0 that was cleared due to this didn't have
> > any effect as long as the bit we meant to clear was already zero.
> 
> I did not have a spec handy, so I didn't check the regs, but clearly the
> DW11 macro referencing other DW11 macros instead of DW0 makes sense.
> 
> Reviewed-by: Jani Nikula <jani.nikula at intel.com>

Merged this and patch 1 to dinq, patch 2 indeed looks a bit more like
-fixes material.
-Daniel
-- 
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch