[Intel-gfx] [PATCH 26/89] drm/i915/skl: Report the PDP regs as in gen8

[Rodrigo Vivi]

I just noticed this is a "legacy" mode 48b and standard for skl would be a
64b aligned..

But anyway this seems to be the right for now so
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>

On Thu, Sep 4, 2014 at 4:26 AM, Damien Lespiau <damien.lespiau at intel.com>
wrote:

> Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
> ---
>  drivers/gpu/drm/i915/i915_gpu_error.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c
> b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 1bf6e69..fe14980 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -924,6 +924,7 @@ static void i915_record_ring_state(struct drm_device
> *dev,
>                 ering->vm_info.gfx_mode = I915_READ(RING_MODE_GEN7(ring));
>
>                 switch (INTEL_INFO(dev)->gen) {
> +               case 9:
>                 case 8:
>                         for (i = 0; i < 4; i++) {
>                                 ering->vm_info.pdp[i] =
> --
> 1.8.3.1
>
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-- 
Rodrigo Vivi
Blog: http://blog.vivi.eng.br
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