[Intel-gfx] [PATCH] drm/i915/skl: Use correct use counters for force wakes

[Tvrtko Ursulin]

On 09/25/2014 01:05 PM, Mika Kuoppala wrote:
> Damien Lespiau <damien.lespiau at intel.com> writes:
>
>> On Thu, Sep 25, 2014 at 11:17:00AM +0100, Tvrtko Ursulin wrote:
>>> From: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>>>
>>> Write and reads following the block changed use engine specific use counters
>>> and unless that is matched here force wake use counting goes bad. Same
>>> force wake is attempted to be taken twice which leads to at least time outs.
>>>
>>> Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin at intel.com>
>>
>> Is it worth a v2 to have gen >= 9 here?
>
> I think we should have gen >= 8 here.

But that would not match against the current implementation of GEN8 vs 
CHV read/write functions.

> Shadowed ELSP's seems not to work on gen8. And the posting read will
> need fw anyways.
>
> Assuming the shadowing works on skl and we can get rid of the posting
> read, we could run this part without taking forcewake.

I don't know what criteria would need to be satisfied to get rid of the 
posting read. On GEN9 only you are saying?

2nd part, how to test if shadowing works? Just remove force wakes and 
see what happens?

Thanks,

Tvrtko