[Intel-gfx] All sort of cdclk stuff

[Ville Syrjälä]

On Wed, Apr 15, 2015 at 04:07:10PM +0300, Mika Kahola wrote:
> This patch series rebases Ville's original cdclk patch series
> excluding the ones that	have been reviewed.
> 
> http://lists.freedesktop.org/archives/intel-gfx/2014-November/055633.html
> 
> The patches include modifications to

BTW it would be a good idaa to include some kind of version number note
on the whole series as well. Otherwise it could get a bit hard to find
out which was the latest one. So the usual form is
"[PATCH vN 00/MM] ..." or something like that.

Also 'git format-patch --cover-letter ...' will generate a reasonably
nice template for your cover letter with shortlog included.

> 
>   drm/i915: Fix i855_get_display_clock_speed()
>   drm/i915: Fix 852GM/GMV cdclk
>   drm/i915: Add cdclk extraction for g33, 965gm and g4x
>   drm/i915: Warn when cdclk for the platforms is not known
>   drm/i915: Cache the current cdclk frequency in dev_priv
>   drm/i915: Use cached cdclk value
>   drm/i915: Unify ilk and hsw .get_aux_clock_divider()
>   drm/i915: Store max cdclk value in dev_priv
>   drm/i915: Don't enable IPS when pixel rate exceeds 95% of cdclk
>   drm/i915: HSW cdclk change support
>   drm/i915: Add IS_BDW_ULX()
>   drm/i915: BDW cdclk change support
>   drm/i915: Limit CHV max cdclk to 320 MHz
>   drm/i915: Modeset global_pipes() update
> 
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> Intel-gfx at lists.freedesktop.org
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-- 
Ville Syrjälä
Intel OTC