[Intel-gfx] [RFC PATCH 01/18] drm/i915: Removing the eDP specific DRRS implementation
Daniel Vetter
daniel at ffwll.ch
Fri Jun 26 09:50:07 PDT 2015
On Fri, Jun 26, 2015 at 07:21:45PM +0530, Ramalingam C wrote:
> EDP specific DRRS implementation is removed to implement a
> generic DRRS stack extentable accross the supportable encoders.
>
> Signed-off-by: Ramalingam C <ramalingam.c at intel.com>
Nack. You don't make something generic by first throwing out the existing
solution (and all the lessons learned implementing that).
Instead convert the edp DRRS implementation over to use generic
structures, step-by-step, and then once that's done it should be simply to
implement DRRS for other outputs.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 110 ---------
> drivers/gpu/drm/i915/i915_drv.h | 22 --
> drivers/gpu/drm/i915/intel_ddi.c | 2 -
> drivers/gpu/drm/i915/intel_dp.c | 392 ------------------------------
> drivers/gpu/drm/i915/intel_drv.h | 5 -
> drivers/gpu/drm/i915/intel_frontbuffer.c | 2 -
> 6 files changed, 533 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
> index c49fe2a..7dbf170 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2962,115 +2962,6 @@ static int i915_ddb_info(struct seq_file *m, void *unused)
> return 0;
> }
>
> -static void drrs_status_per_crtc(struct seq_file *m,
> - struct drm_device *dev, struct intel_crtc *intel_crtc)
> -{
> - struct intel_encoder *intel_encoder;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - struct i915_drrs *drrs = &dev_priv->drrs;
> - int vrefresh = 0;
> -
> - for_each_encoder_on_crtc(dev, &intel_crtc->base, intel_encoder) {
> - /* Encoder connected on this CRTC */
> - switch (intel_encoder->type) {
> - case INTEL_OUTPUT_EDP:
> - seq_puts(m, "eDP:\n");
> - break;
> - case INTEL_OUTPUT_DSI:
> - seq_puts(m, "DSI:\n");
> - break;
> - case INTEL_OUTPUT_HDMI:
> - seq_puts(m, "HDMI:\n");
> - break;
> - case INTEL_OUTPUT_DISPLAYPORT:
> - seq_puts(m, "DP:\n");
> - break;
> - default:
> - seq_printf(m, "Other encoder (id=%d).\n",
> - intel_encoder->type);
> - return;
> - }
> - }
> -
> - if (dev_priv->vbt.drrs_type == STATIC_DRRS_SUPPORT)
> - seq_puts(m, "\tVBT: DRRS_type: Static");
> - else if (dev_priv->vbt.drrs_type == SEAMLESS_DRRS_SUPPORT)
> - seq_puts(m, "\tVBT: DRRS_type: Seamless");
> - else if (dev_priv->vbt.drrs_type == DRRS_NOT_SUPPORTED)
> - seq_puts(m, "\tVBT: DRRS_type: None");
> - else
> - seq_puts(m, "\tVBT: DRRS_type: FIXME: Unrecognized Value");
> -
> - seq_puts(m, "\n\n");
> -
> - if (to_intel_crtc_state(intel_crtc->base.state)->has_drrs) {
> - struct intel_panel *panel;
> -
> - mutex_lock(&drrs->mutex);
> - /* DRRS Supported */
> - seq_puts(m, "\tDRRS Supported: Yes\n");
> -
> - /* disable_drrs() will make drrs->dp NULL */
> - if (!drrs->dp) {
> - seq_puts(m, "Idleness DRRS: Disabled");
> - mutex_unlock(&drrs->mutex);
> - return;
> - }
> -
> - panel = &drrs->dp->attached_connector->panel;
> - seq_printf(m, "\t\tBusy_frontbuffer_bits: 0x%X",
> - drrs->busy_frontbuffer_bits);
> -
> - seq_puts(m, "\n\t\t");
> - if (drrs->refresh_rate_type == DRRS_HIGH_RR) {
> - seq_puts(m, "DRRS_State: DRRS_HIGH_RR\n");
> - vrefresh = panel->fixed_mode->vrefresh;
> - } else if (drrs->refresh_rate_type == DRRS_LOW_RR) {
> - seq_puts(m, "DRRS_State: DRRS_LOW_RR\n");
> - vrefresh = panel->downclock_mode->vrefresh;
> - } else {
> - seq_printf(m, "DRRS_State: Unknown(%d)\n",
> - drrs->refresh_rate_type);
> - mutex_unlock(&drrs->mutex);
> - return;
> - }
> - seq_printf(m, "\t\tVrefresh: %d", vrefresh);
> -
> - seq_puts(m, "\n\t\t");
> - mutex_unlock(&drrs->mutex);
> - } else {
> - /* DRRS not supported. Print the VBT parameter*/
> - seq_puts(m, "\tDRRS Supported : No");
> - }
> - seq_puts(m, "\n");
> -}
> -
> -static int i915_drrs_status(struct seq_file *m, void *unused)
> -{
> - struct drm_info_node *node = m->private;
> - struct drm_device *dev = node->minor->dev;
> - struct intel_crtc *intel_crtc;
> - int active_crtc_cnt = 0;
> -
> - for_each_intel_crtc(dev, intel_crtc) {
> - drm_modeset_lock(&intel_crtc->base.mutex, NULL);
> -
> - if (intel_crtc->base.state->active) {
> - active_crtc_cnt++;
> - seq_printf(m, "\nCRTC %d: ", active_crtc_cnt);
> -
> - drrs_status_per_crtc(m, dev, intel_crtc);
> - }
> -
> - drm_modeset_unlock(&intel_crtc->base.mutex);
> - }
> -
> - if (!active_crtc_cnt)
> - seq_puts(m, "No active crtc found\n");
> -
> - return 0;
> -}
> -
> struct pipe_crc_info {
> const char *name;
> struct drm_device *dev;
> @@ -5048,7 +4939,6 @@ static const struct drm_info_list i915_debugfs_list[] = {
> {"i915_wa_registers", i915_wa_registers, 0},
> {"i915_ddb_info", i915_ddb_info, 0},
> {"i915_sseu_status", i915_sseu_status, 0},
> - {"i915_drrs_status", i915_drrs_status, 0},
> {"i915_rps_boost_info", i915_rps_boost_info, 0},
> };
> #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 491ef0c..922dd68 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -930,33 +930,12 @@ struct i915_fbc {
> } no_fbc_reason;
> };
>
> -/**
> - * HIGH_RR is the highest eDP panel refresh rate read from EDID
> - * LOW_RR is the lowest eDP panel refresh rate found from EDID
> - * parsing for same resolution.
> - */
> -enum drrs_refresh_rate_type {
> - DRRS_HIGH_RR,
> - DRRS_LOW_RR,
> - DRRS_MAX_RR, /* RR count */
> -};
> -
> enum drrs_support_type {
> DRRS_NOT_SUPPORTED = 0,
> STATIC_DRRS_SUPPORT = 1,
> SEAMLESS_DRRS_SUPPORT = 2
> };
>
> -struct intel_dp;
> -struct i915_drrs {
> - struct mutex mutex;
> - struct delayed_work work;
> - struct intel_dp *dp;
> - unsigned busy_frontbuffer_bits;
> - enum drrs_refresh_rate_type refresh_rate_type;
> - enum drrs_support_type type;
> -};
> -
> struct i915_psr {
> struct mutex lock;
> bool sink_support;
> @@ -1718,7 +1697,6 @@ struct drm_i915_private {
>
> struct i915_hotplug hotplug;
> struct i915_fbc fbc;
> - struct i915_drrs drrs;
> struct intel_opregion opregion;
> struct intel_vbt_data vbt;
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 31b29e8..75afbd7 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2012,7 +2012,6 @@ static void intel_enable_ddi(struct intel_encoder *intel_encoder)
>
> intel_edp_backlight_on(intel_dp);
> intel_psr_enable(intel_dp);
> - intel_edp_drrs_enable(intel_dp);
> }
>
> if (intel_crtc->config->has_audio) {
> @@ -2038,7 +2037,6 @@ static void intel_disable_ddi(struct intel_encoder *intel_encoder)
> if (type == INTEL_OUTPUT_EDP) {
> struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
>
> - intel_edp_drrs_disable(intel_dp);
> intel_psr_disable(intel_dp);
> intel_edp_backlight_off(intel_dp);
> }
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index f52eef1..738e98e 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -1483,15 +1483,6 @@ found:
> pipe_config->port_clock,
> &pipe_config->dp_m_n);
>
> - if (intel_connector->panel.downclock_mode != NULL &&
> - dev_priv->drrs.type == SEAMLESS_DRRS_SUPPORT) {
> - pipe_config->has_drrs = true;
> - intel_link_compute_m_n(bpp, lane_count,
> - intel_connector->panel.downclock_mode->clock,
> - pipe_config->port_clock,
> - &pipe_config->dp_m2_n2);
> - }
> -
> if (IS_SKYLAKE(dev) && is_edp(intel_dp))
> skl_edp_set_pll_config(pipe_config, common_rates[clock]);
> else if (IS_BROXTON(dev))
> @@ -5254,387 +5245,6 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev,
> I915_READ(pp_div_reg));
> }
>
> -/**
> - * intel_dp_set_drrs_state - program registers for RR switch to take effect
> - * @dev: DRM device
> - * @refresh_rate: RR to be programmed
> - *
> - * This function gets called when refresh rate (RR) has to be changed from
> - * one frequency to another. Switches can be between high and low RR
> - * supported by the panel or to any other RR based on media playback (in
> - * this case, RR value needs to be passed from user space).
> - *
> - * The caller of this function needs to take a lock on dev_priv->drrs.
> - */
> -static void intel_dp_set_drrs_state(struct drm_device *dev, int refresh_rate)
> -{
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - struct intel_encoder *encoder;
> - struct intel_digital_port *dig_port = NULL;
> - struct intel_dp *intel_dp = dev_priv->drrs.dp;
> - struct intel_crtc_state *config = NULL;
> - struct intel_crtc *intel_crtc = NULL;
> - u32 reg, val;
> - enum drrs_refresh_rate_type index = DRRS_HIGH_RR;
> -
> - if (refresh_rate <= 0) {
> - DRM_DEBUG_KMS("Refresh rate should be positive non-zero.\n");
> - return;
> - }
> -
> - if (intel_dp == NULL) {
> - DRM_DEBUG_KMS("DRRS not supported.\n");
> - return;
> - }
> -
> - /*
> - * FIXME: This needs proper synchronization with psr state for some
> - * platforms that cannot have PSR and DRRS enabled at the same time.
> - */
> -
> - dig_port = dp_to_dig_port(intel_dp);
> - encoder = &dig_port->base;
> - intel_crtc = to_intel_crtc(encoder->base.crtc);
> -
> - if (!intel_crtc) {
> - DRM_DEBUG_KMS("DRRS: intel_crtc not initialized\n");
> - return;
> - }
> -
> - config = intel_crtc->config;
> -
> - if (dev_priv->drrs.type < SEAMLESS_DRRS_SUPPORT) {
> - DRM_DEBUG_KMS("Only Seamless DRRS supported.\n");
> - return;
> - }
> -
> - if (intel_dp->attached_connector->panel.downclock_mode->vrefresh ==
> - refresh_rate)
> - index = DRRS_LOW_RR;
> -
> - if (index == dev_priv->drrs.refresh_rate_type) {
> - DRM_DEBUG_KMS(
> - "DRRS requested for previously set RR...ignoring\n");
> - return;
> - }
> -
> - if (!intel_crtc->active) {
> - DRM_DEBUG_KMS("eDP encoder disabled. CRTC not Active\n");
> - return;
> - }
> -
> - if (INTEL_INFO(dev)->gen >= 8 && !IS_CHERRYVIEW(dev)) {
> - switch (index) {
> - case DRRS_HIGH_RR:
> - intel_dp_set_m_n(intel_crtc, M1_N1);
> - break;
> - case DRRS_LOW_RR:
> - intel_dp_set_m_n(intel_crtc, M2_N2);
> - break;
> - case DRRS_MAX_RR:
> - default:
> - DRM_ERROR("Unsupported refreshrate type\n");
> - }
> - } else if (INTEL_INFO(dev)->gen > 6) {
> - reg = PIPECONF(intel_crtc->config->cpu_transcoder);
> - val = I915_READ(reg);
> -
> - if (index > DRRS_HIGH_RR) {
> - if (IS_VALLEYVIEW(dev))
> - val |= PIPECONF_EDP_RR_MODE_SWITCH_VLV;
> - else
> - val |= PIPECONF_EDP_RR_MODE_SWITCH;
> - } else {
> - if (IS_VALLEYVIEW(dev))
> - val &= ~PIPECONF_EDP_RR_MODE_SWITCH_VLV;
> - else
> - val &= ~PIPECONF_EDP_RR_MODE_SWITCH;
> - }
> - I915_WRITE(reg, val);
> - }
> -
> - dev_priv->drrs.refresh_rate_type = index;
> -
> - DRM_DEBUG_KMS("eDP Refresh Rate set to : %dHz\n", refresh_rate);
> -}
> -
> -/**
> - * intel_edp_drrs_enable - init drrs struct if supported
> - * @intel_dp: DP struct
> - *
> - * Initializes frontbuffer_bits and drrs.dp
> - */
> -void intel_edp_drrs_enable(struct intel_dp *intel_dp)
> -{
> - struct drm_device *dev = intel_dp_to_dev(intel_dp);
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> - struct drm_crtc *crtc = dig_port->base.base.crtc;
> - struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> -
> - if (!intel_crtc->config->has_drrs) {
> - DRM_DEBUG_KMS("Panel doesn't support DRRS\n");
> - return;
> - }
> -
> - mutex_lock(&dev_priv->drrs.mutex);
> - if (WARN_ON(dev_priv->drrs.dp)) {
> - DRM_ERROR("DRRS already enabled\n");
> - goto unlock;
> - }
> -
> - dev_priv->drrs.busy_frontbuffer_bits = 0;
> -
> - dev_priv->drrs.dp = intel_dp;
> -
> -unlock:
> - mutex_unlock(&dev_priv->drrs.mutex);
> -}
> -
> -/**
> - * intel_edp_drrs_disable - Disable DRRS
> - * @intel_dp: DP struct
> - *
> - */
> -void intel_edp_drrs_disable(struct intel_dp *intel_dp)
> -{
> - struct drm_device *dev = intel_dp_to_dev(intel_dp);
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - struct intel_digital_port *dig_port = dp_to_dig_port(intel_dp);
> - struct drm_crtc *crtc = dig_port->base.base.crtc;
> - struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
> -
> - if (!intel_crtc->config->has_drrs)
> - return;
> -
> - mutex_lock(&dev_priv->drrs.mutex);
> - if (!dev_priv->drrs.dp) {
> - mutex_unlock(&dev_priv->drrs.mutex);
> - return;
> - }
> -
> - if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR)
> - intel_dp_set_drrs_state(dev_priv->dev,
> - intel_dp->attached_connector->panel.
> - fixed_mode->vrefresh);
> -
> - dev_priv->drrs.dp = NULL;
> - mutex_unlock(&dev_priv->drrs.mutex);
> -
> - cancel_delayed_work_sync(&dev_priv->drrs.work);
> -}
> -
> -static void intel_edp_drrs_downclock_work(struct work_struct *work)
> -{
> - struct drm_i915_private *dev_priv =
> - container_of(work, typeof(*dev_priv), drrs.work.work);
> - struct intel_dp *intel_dp;
> -
> - mutex_lock(&dev_priv->drrs.mutex);
> -
> - intel_dp = dev_priv->drrs.dp;
> -
> - if (!intel_dp)
> - goto unlock;
> -
> - /*
> - * The delayed work can race with an invalidate hence we need to
> - * recheck.
> - */
> -
> - if (dev_priv->drrs.busy_frontbuffer_bits)
> - goto unlock;
> -
> - if (dev_priv->drrs.refresh_rate_type != DRRS_LOW_RR)
> - intel_dp_set_drrs_state(dev_priv->dev,
> - intel_dp->attached_connector->panel.
> - downclock_mode->vrefresh);
> -
> -unlock:
> - mutex_unlock(&dev_priv->drrs.mutex);
> -}
> -
> -/**
> - * intel_edp_drrs_invalidate - Disable Idleness DRRS
> - * @dev: DRM device
> - * @frontbuffer_bits: frontbuffer plane tracking bits
> - *
> - * This function gets called everytime rendering on the given planes start.
> - * Hence DRRS needs to be Upclocked, i.e. (LOW_RR -> HIGH_RR).
> - *
> - * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
> - */
> -void intel_edp_drrs_invalidate(struct drm_device *dev,
> - unsigned frontbuffer_bits)
> -{
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - struct drm_crtc *crtc;
> - enum pipe pipe;
> -
> - if (dev_priv->drrs.type == DRRS_NOT_SUPPORTED)
> - return;
> -
> - cancel_delayed_work(&dev_priv->drrs.work);
> -
> - mutex_lock(&dev_priv->drrs.mutex);
> - if (!dev_priv->drrs.dp) {
> - mutex_unlock(&dev_priv->drrs.mutex);
> - return;
> - }
> -
> - crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc;
> - pipe = to_intel_crtc(crtc)->pipe;
> -
> - /* invalidate means busy screen hence upclock */
> - if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR) {
> - intel_dp_set_drrs_state(dev_priv->dev,
> - dev_priv->drrs.dp->attached_connector->panel.
> - fixed_mode->vrefresh);
> - }
> -
> - frontbuffer_bits &= INTEL_FRONTBUFFER_ALL_MASK(pipe);
> -
> - dev_priv->drrs.busy_frontbuffer_bits |= frontbuffer_bits;
> - mutex_unlock(&dev_priv->drrs.mutex);
> -}
> -
> -/**
> - * intel_edp_drrs_flush - Restart Idleness DRRS
> - * @dev: DRM device
> - * @frontbuffer_bits: frontbuffer plane tracking bits
> - *
> - * This function gets called every time rendering on the given planes has
> - * completed or flip on a crtc is completed. So DRRS should be upclocked
> - * (LOW_RR -> HIGH_RR). And also Idleness detection should be started again,
> - * if no other planes are dirty.
> - *
> - * Dirty frontbuffers relevant to DRRS are tracked in busy_frontbuffer_bits.
> - */
> -void intel_edp_drrs_flush(struct drm_device *dev,
> - unsigned frontbuffer_bits)
> -{
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - struct drm_crtc *crtc;
> - enum pipe pipe;
> -
> - if (dev_priv->drrs.type == DRRS_NOT_SUPPORTED)
> - return;
> -
> - cancel_delayed_work(&dev_priv->drrs.work);
> -
> - mutex_lock(&dev_priv->drrs.mutex);
> - if (!dev_priv->drrs.dp) {
> - mutex_unlock(&dev_priv->drrs.mutex);
> - return;
> - }
> -
> - crtc = dp_to_dig_port(dev_priv->drrs.dp)->base.base.crtc;
> - pipe = to_intel_crtc(crtc)->pipe;
> - dev_priv->drrs.busy_frontbuffer_bits &= ~frontbuffer_bits;
> -
> - /* flush means busy screen hence upclock */
> - if (dev_priv->drrs.refresh_rate_type == DRRS_LOW_RR)
> - intel_dp_set_drrs_state(dev_priv->dev,
> - dev_priv->drrs.dp->attached_connector->panel.
> - fixed_mode->vrefresh);
> -
> - /*
> - * flush also means no more activity hence schedule downclock, if all
> - * other fbs are quiescent too
> - */
> - if (!dev_priv->drrs.busy_frontbuffer_bits)
> - schedule_delayed_work(&dev_priv->drrs.work,
> - msecs_to_jiffies(1000));
> - mutex_unlock(&dev_priv->drrs.mutex);
> -}
> -
> -/**
> - * DOC: Display Refresh Rate Switching (DRRS)
> - *
> - * Display Refresh Rate Switching (DRRS) is a power conservation feature
> - * which enables swtching between low and high refresh rates,
> - * dynamically, based on the usage scenario. This feature is applicable
> - * for internal panels.
> - *
> - * Indication that the panel supports DRRS is given by the panel EDID, which
> - * would list multiple refresh rates for one resolution.
> - *
> - * DRRS is of 2 types - static and seamless.
> - * Static DRRS involves changing refresh rate (RR) by doing a full modeset
> - * (may appear as a blink on screen) and is used in dock-undock scenario.
> - * Seamless DRRS involves changing RR without any visual effect to the user
> - * and can be used during normal system usage. This is done by programming
> - * certain registers.
> - *
> - * Support for static/seamless DRRS may be indicated in the VBT based on
> - * inputs from the panel spec.
> - *
> - * DRRS saves power by switching to low RR based on usage scenarios.
> - *
> - * eDP DRRS:-
> - * The implementation is based on frontbuffer tracking implementation.
> - * When there is a disturbance on the screen triggered by user activity or a
> - * periodic system activity, DRRS is disabled (RR is changed to high RR).
> - * When there is no movement on screen, after a timeout of 1 second, a switch
> - * to low RR is made.
> - * For integration with frontbuffer tracking code,
> - * intel_edp_drrs_invalidate() and intel_edp_drrs_flush() are called.
> - *
> - * DRRS can be further extended to support other internal panels and also
> - * the scenario of video playback wherein RR is set based on the rate
> - * requested by userspace.
> - */
> -
> -/**
> - * intel_dp_drrs_init - Init basic DRRS work and mutex.
> - * @intel_connector: eDP connector
> - * @fixed_mode: preferred mode of panel
> - *
> - * This function is called only once at driver load to initialize basic
> - * DRRS stuff.
> - *
> - * Returns:
> - * Downclock mode if panel supports it, else return NULL.
> - * DRRS support is determined by the presence of downclock mode (apart
> - * from VBT setting).
> - */
> -static struct drm_display_mode *
> -intel_dp_drrs_init(struct intel_connector *intel_connector,
> - struct drm_display_mode *fixed_mode)
> -{
> - struct drm_connector *connector = &intel_connector->base;
> - struct drm_device *dev = connector->dev;
> - struct drm_i915_private *dev_priv = dev->dev_private;
> - struct drm_display_mode *downclock_mode = NULL;
> -
> - INIT_DELAYED_WORK(&dev_priv->drrs.work, intel_edp_drrs_downclock_work);
> - mutex_init(&dev_priv->drrs.mutex);
> -
> - if (INTEL_INFO(dev)->gen <= 6) {
> - DRM_DEBUG_KMS("DRRS supported for Gen7 and above\n");
> - return NULL;
> - }
> -
> - if (dev_priv->vbt.drrs_type != SEAMLESS_DRRS_SUPPORT) {
> - DRM_DEBUG_KMS("VBT doesn't support DRRS\n");
> - return NULL;
> - }
> -
> - downclock_mode = intel_find_panel_downclock
> - (dev, fixed_mode, connector);
> -
> - if (!downclock_mode) {
> - DRM_DEBUG_KMS("Downclock mode is not found. DRRS not supported\n");
> - return NULL;
> - }
> -
> - dev_priv->drrs.type = dev_priv->vbt.drrs_type;
> -
> - dev_priv->drrs.refresh_rate_type = DRRS_HIGH_RR;
> - DRM_DEBUG_KMS("seamless DRRS supported for eDP panel.\n");
> - return downclock_mode;
> -}
> -
> static bool intel_edp_init_connector(struct intel_dp *intel_dp,
> struct intel_connector *intel_connector)
> {
> @@ -5696,8 +5306,6 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp,
> list_for_each_entry(scan, &connector->probed_modes, head) {
> if ((scan->type & DRM_MODE_TYPE_PREFERRED)) {
> fixed_mode = drm_mode_duplicate(dev, scan);
> - downclock_mode = intel_dp_drrs_init(
> - intel_connector, fixed_mode);
> break;
> }
> }
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index bcafefc..e2f534a 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1198,11 +1198,6 @@ void intel_dp_hot_plug(struct intel_encoder *intel_encoder);
> void vlv_power_sequencer_reset(struct drm_i915_private *dev_priv);
> uint32_t intel_dp_pack_aux(const uint8_t *src, int src_bytes);
> void intel_plane_destroy(struct drm_plane *plane);
> -void intel_edp_drrs_enable(struct intel_dp *intel_dp);
> -void intel_edp_drrs_disable(struct intel_dp *intel_dp);
> -void intel_edp_drrs_invalidate(struct drm_device *dev,
> - unsigned frontbuffer_bits);
> -void intel_edp_drrs_flush(struct drm_device *dev, unsigned frontbuffer_bits);
>
> /* intel_dp_mst.c */
> int intel_dp_mst_encoder_init(struct intel_digital_port *intel_dig_port, int conn_id);
> diff --git a/drivers/gpu/drm/i915/intel_frontbuffer.c b/drivers/gpu/drm/i915/intel_frontbuffer.c
> index 57095f5..249d0b3 100644
> --- a/drivers/gpu/drm/i915/intel_frontbuffer.c
> +++ b/drivers/gpu/drm/i915/intel_frontbuffer.c
> @@ -154,7 +154,6 @@ void intel_fb_obj_invalidate(struct drm_i915_gem_object *obj,
> intel_mark_fb_busy(dev, obj->frontbuffer_bits, ring);
>
> intel_psr_invalidate(dev, obj->frontbuffer_bits);
> - intel_edp_drrs_invalidate(dev, obj->frontbuffer_bits);
> intel_fbc_invalidate(dev_priv, obj->frontbuffer_bits, origin);
> }
>
> @@ -181,7 +180,6 @@ void intel_frontbuffer_flush(struct drm_device *dev,
>
> intel_mark_fb_busy(dev, frontbuffer_bits, NULL);
>
> - intel_edp_drrs_flush(dev, frontbuffer_bits);
> intel_psr_flush(dev, frontbuffer_bits);
> intel_fbc_flush(dev_priv, frontbuffer_bits);
> }
> --
> 1.7.9.5
>
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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