[Intel-gfx] [PATCH 4/6] drm/i915/skl: Embed the CSR lock into its own structure

Damien Lespiau damien.lespiau at intel.com
Tue Jun 30 11:28:57 PDT 2015


When we have a well defined structure, it's customary to put the lock
protecting its fields inside.

Signed-off-by: Damien Lespiau <damien.lespiau at intel.com>
---
 drivers/gpu/drm/i915/i915_dma.c  |  1 -
 drivers/gpu/drm/i915/i915_drv.h  |  5 ++---
 drivers/gpu/drm/i915/intel_csr.c | 14 ++++++++------
 3 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index c5349fa..1ebf0e1 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -820,7 +820,6 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 	spin_lock_init(&dev_priv->mmio_flip_lock);
 	mutex_init(&dev_priv->sb_lock);
 	mutex_init(&dev_priv->modeset_restore_lock);
-	mutex_init(&dev_priv->csr_lock);
 
 	intel_pm_setup(dev);
 
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index e15cb56..64c5184 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -741,6 +741,8 @@ enum csr_state {
 };
 
 struct intel_csr {
+	struct mutex lock;
+
 	const char *fw_path;
 	__be32 *dmc_payload;
 	uint32_t dmc_fw_size;
@@ -1689,9 +1691,6 @@ struct drm_i915_private {
 
 	struct intel_csr csr;
 
-	/* Display CSR-related protection */
-	struct mutex csr_lock;
-
 	struct intel_gmbus gmbus[GMBUS_NUM_PINS];
 
 	/** gmbus_mutex protects against concurrent usage of the single hw gmbus
diff --git a/drivers/gpu/drm/i915/intel_csr.c b/drivers/gpu/drm/i915/intel_csr.c
index f83a2bf..d51cbae 100644
--- a/drivers/gpu/drm/i915/intel_csr.c
+++ b/drivers/gpu/drm/i915/intel_csr.c
@@ -211,9 +211,9 @@ enum csr_state intel_csr_load_status_get(struct drm_i915_private *dev_priv)
 {
 	enum csr_state state;
 
-	mutex_lock(&dev_priv->csr_lock);
+	mutex_lock(&dev_priv->csr.lock);
 	state = dev_priv->csr.state;
-	mutex_unlock(&dev_priv->csr_lock);
+	mutex_unlock(&dev_priv->csr.lock);
 
 	return state;
 }
@@ -228,9 +228,9 @@ enum csr_state intel_csr_load_status_get(struct drm_i915_private *dev_priv)
 void intel_csr_load_status_set(struct drm_i915_private *dev_priv,
 			enum csr_state state)
 {
-	mutex_lock(&dev_priv->csr_lock);
+	mutex_lock(&dev_priv->csr.lock);
 	dev_priv->csr.state = state;
-	mutex_unlock(&dev_priv->csr_lock);
+	mutex_unlock(&dev_priv->csr.lock);
 }
 
 /**
@@ -252,7 +252,7 @@ void intel_csr_load_program(struct drm_device *dev)
 		return;
 	}
 
-	mutex_lock(&dev_priv->csr_lock);
+	mutex_lock(&dev_priv->csr.lock);
 	fw_size = dev_priv->csr.dmc_fw_size;
 	for (i = 0; i < fw_size; i++)
 		I915_WRITE(CSR_PROGRAM_BASE + i * 4,
@@ -264,7 +264,7 @@ void intel_csr_load_program(struct drm_device *dev)
 	}
 
 	dev_priv->csr.state = FW_LOADED;
-	mutex_unlock(&dev_priv->csr_lock);
+	mutex_unlock(&dev_priv->csr.lock);
 }
 
 static void finish_csr_load(const struct firmware *fw, void *context)
@@ -429,6 +429,8 @@ void intel_csr_ucode_init(struct drm_device *dev)
 		return;
 	}
 
+	mutex_init(&dev_priv->csr.lock);
+
 	DRM_DEBUG_KMS("Loading %s\n", csr->fw_path);
 
 	/*
-- 
2.1.0



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