[Intel-gfx] [PATCH] drm/i915/bxt: BUNs related to port PLL

Jindal, Sonika sonika.jindal at intel.com
Tue Jun 30 21:21:16 PDT 2015



On 7/1/2015 10:06 AM, Vandana Kannan wrote:
> This patch contains changes based on 2 updates to the spec:
> Port PLL VCO restriction raised up to 6700.
> Port PLL now needs DCO amp override enable for all VCO frequencies.
>
> Signed-off-by: Vandana Kannan <vandana.kannan at intel.com>
> ---
>   drivers/gpu/drm/i915/intel_ddi.c     | 7 +++----
>   drivers/gpu/drm/i915/intel_display.c | 2 +-
>   2 files changed, 4 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index 42c1487..677096d 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -1495,8 +1495,8 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>   	}
>
>   	dco_amp = 15;
> -	dcoampovr_en_h = 0;
> -	if (vco >= 6200000 && vco <= 6480000) {
> +	dcoampovr_en_h = 1;
You dont need this variable now..

> +	if (vco >= 6200000 && vco <= 6700000) {
>   		prop_coef = 4;
>   		int_coef = 9;
>   		gain_ctl = 3;
> @@ -1550,8 +1550,7 @@ bxt_ddi_pll_select(struct intel_crtc *intel_crtc,
>
>   	crtc_state->dpll_hw_state.pll8 = targ_cnt;
>
> -	if (dcoampovr_en_h)
> -		crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H;
> +	crtc_state->dpll_hw_state.pll10 = PORT_PLL_DCO_AMP_OVR_EN_H;
>
>   	crtc_state->dpll_hw_state.pll10 |= PORT_PLL_DCO_AMP(dco_amp);
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index eb665d7..e04be45 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -409,7 +409,7 @@ static const intel_limit_t intel_limits_chv = {
>   static const intel_limit_t intel_limits_bxt = {
>   	/* FIXME: find real dot limits */
>   	.dot = { .min = 0, .max = INT_MAX },
> -	.vco = { .min = 4800000, .max = 6480000 },
> +	.vco = { .min = 4800000, .max = 6700000 },
>   	.n = { .min = 1, .max = 1 },
>   	.m1 = { .min = 2, .max = 2 },
>   	/* FIXME: find real m2 limits */
>


More information about the Intel-gfx mailing list