[Intel-gfx] [PATCH v2] drm/dp: add DPCD definitions from DP 1.1 and 1.2a

[shuang.he at intel.com]

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 5849
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -9              278/278              269/278
ILK                                  308/308              308/308
SNB                 -1              284/284              283/284
IVB                                  380/380              380/380
BYT                                  294/294              294/294
HSW                 -1              387/387              386/387
BDW                 -1              316/316              315/316
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*PNV  igt_gem_fence_thrash_bo-write-verify-none      PASS(3)      FAIL(1)PASS(1)
*PNV  igt_gem_fence_thrash_bo-write-verify-x      PASS(3)      FAIL(1)PASS(1)
*PNV  igt_gem_fence_thrash_bo-write-verify-y      PASS(3)      FAIL(1)PASS(1)
 PNV  igt_gem_userptr_blits_coherency-sync      CRASH(2)PASS(4)      CRASH(2)
 PNV  igt_gem_userptr_blits_coherency-unsync      CRASH(2)PASS(3)      CRASH(2)
*PNV  igt_gem_userptr_blits_minor-normal-sync      PASS(2)      DMESG_WARN(1)PASS(1)
 PNV  igt_gen3_render_linear_blits      FAIL(3)PASS(3)      FAIL(2)
 PNV  igt_gen3_render_mixed_blits      FAIL(2)PASS(6)      FAIL(2)
*PNV  igt_gem_fence_thrash_bo-write-verify-threaded-none      CRASH(1)PASS(3)      FAIL(1)CRASH(1)
*SNB  igt_gem_fenced_exec_thrash_no-spare-fences-interruptible      PASS(1)      DMESG_WARN(1)PASS(1)
*HSW  igt_gem_storedw_loop_blt      PASS(3)      DMESG_WARN(1)PASS(1)
*BDW  igt_gem_gtt_hog      PASS(7)      DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'