[Intel-gfx] Preventing zero GPU virtual address allocation
Jesse Barnes
jbarnes at virtuousgeek.org
Mon Mar 9 08:46:15 PDT 2015
On 03/05/2015 01:07 PM, Chris Wilson wrote:
> On Thu, Mar 05, 2015 at 04:27:59PM +0100, Daniel Vetter wrote:
>> I recommended exposing the PIN_BIAS since that will work without full
>> ppgtt too. And yeah for full ppgtt we could just use svm where userspace
>> controls the address, but since that's still a bit out we might need a
>> quick interim solution?
>
> Letting userspace control the address of bo used in a batch is about 2
> patches each of ~100 lines. And it could be used will full-ppgtt before
> svm if mesa wants to take complete control of its layout. I think it is
> one of those useful tools that is likely to find uses far beyond the
> initial justification.
Well we need someone to pick it up and do it; we've already shafted
userspace for several years due to foot dragging on the command
parser... I hope something as simple as this doesn't stall out.
Jesse
More information about the Intel-gfx
mailing list