[Intel-gfx] Preventing zero GPU virtual address allocation

[Jesse Barnes]

On 03/09/2015 08:46 AM, Jesse Barnes wrote:
> On 03/05/2015 01:07 PM, Chris Wilson wrote:
>> On Thu, Mar 05, 2015 at 04:27:59PM +0100, Daniel Vetter wrote:
>>> I recommended exposing the PIN_BIAS since that will work without full
>>> ppgtt too. And yeah for full ppgtt we could just use svm where userspace
>>> controls the address, but since that's still a bit out we might need a
>>> quick interim solution?
>>
>> Letting userspace control the address of bo used in a batch is about 2
>> patches each of ~100 lines. And it could be used will full-ppgtt before
>> svm if mesa wants to take complete control of its layout. I think it is
>> one of those useful tools that is likely to find uses far beyond the
>> initial justification.
> 
> Well we need someone to pick it up and do it; we've already shafted
> userspace for several years due to foot dragging on the command
> parser...  I hope something as simple as this doesn't stall out.

Nevermind, I see you already did it.  Ruiling and Nanhai, can you make
sure Chris's proposed interface will work for you and provide a review
if so?

Thanks,
Jesse