[Intel-gfx] [PATCH] drm/i915: Add polish to VLV WM shift+mask operations

[shuang.he at intel.com]

Tested-By: PRC QA PRTS (Patch Regression Test System Contact: shuang.he at intel.com)
Task id: 5926
-------------------------------------Summary-------------------------------------
Platform          Delta          drm-intel-nightly          Series Applied
PNV                 -3              281/281              278/281
ILK                                  308/308              308/308
SNB                 -1              284/284              283/284
IVB                 -1              375/375              374/375
BYT                                  294/294              294/294
HSW                                  384/384              384/384
BDW                                  315/315              315/315
-------------------------------------Detailed-------------------------------------
Platform  Test                                drm-intel-nightly          Series Applied
*PNV  igt_gen3_render_mixed_blits      PASS(1)      FAIL(2)
 PNV  igt_gen3_render_tiledx_blits      FAIL(1)PASS(1)      FAIL(1)
 PNV  igt_gen3_render_tiledy_blits      FAIL(1)PASS(1)      FAIL(1)
*SNB  igt_gem_flink_bad-flink      PASS(1)      DMESG_WARN(1)PASS(1)
*IVB  igt_gem_storedw_batches_loop_normal      PASS(1)      DMESG_WARN(1)PASS(1)
Note: You need to pay more attention to line start with '*'