[Intel-gfx] [PATCH v2 8/9] drm/i915: Use state->visible in wm calculation

[ville.syrjala at linux.intel.com]

From: Ville Syrjälä <ville.syrjala at linux.intel.com>

v2: Rebase and update the vlv/chv code as well

Cc: Matt Roper <matthew.d.roper at intel.com>
Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 42 ++++++++++++++++++-----------------------
 1 file changed, 18 insertions(+), 24 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index e18f0fd..a8c6578 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -915,18 +915,16 @@ static uint8_t vlv_compute_drain_latency(struct drm_crtc *crtc,
 	int entries, prec_mult, drain_latency, pixel_size;
 	int clock = intel_crtc->config->base.adjusted_mode.crtc_clock;
 	const int high_precision = IS_CHERRYVIEW(dev) ? 16 : 64;
+	const struct intel_plane_state *state =
+		to_intel_plane_state(plane->state);
 
-	/*
-	 * FIXME the plane might have an fb
-	 * but be invisible (eg. due to clipping)
-	 */
-	if (!intel_crtc->active || !plane->state->fb)
+	if (!state->visible)
 		return 0;
 
 	if (WARN(clock == 0, "Pixel clock is zero!\n"))
 		return 0;
 
-	pixel_size = drm_format_plane_cpp(plane->state->fb->pixel_format, 0);
+	pixel_size = drm_format_plane_cpp(state->base.fb->pixel_format, 0);
 
 	if (WARN(pixel_size == 0, "Pixel size is zero!\n"))
 		return 0;
@@ -953,15 +951,13 @@ static int vlv_compute_wm(struct intel_crtc *crtc,
 			  int fifo_size)
 {
 	int clock, entries, pixel_size;
+	const struct intel_plane_state *state =
+		to_intel_plane_state(plane->base.state);
 
-	/*
-	 * FIXME the plane might have an fb
-	 * but be invisible (eg. due to clipping)
-	 */
-	if (!crtc->active || !plane->base.state->fb)
+	if (!state->visible)
 		return 0;
 
-	pixel_size = drm_format_plane_cpp(plane->base.state->fb->pixel_format, 0);
+	pixel_size = drm_format_plane_cpp(state->base.fb->pixel_format, 0);
 	clock = crtc->config->base.adjusted_mode.crtc_clock;
 
 	entries = DIV_ROUND_UP(clock, 1000) * pixel_size;
@@ -2037,6 +2033,7 @@ static void ilk_compute_wm_parameters(struct drm_crtc *crtc,
 	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
 	enum pipe pipe = intel_crtc->pipe;
 	struct drm_plane *plane;
+	const struct intel_plane_state *state;
 
 	if (!intel_crtc->active)
 		return;
@@ -2045,24 +2042,21 @@ static void ilk_compute_wm_parameters(struct drm_crtc *crtc,
 	p->pipe_htotal = intel_crtc->config->base.adjusted_mode.crtc_htotal;
 	p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
 
-	if (crtc->primary->state->fb) {
+	state = to_intel_plane_state(crtc->primary->state);
+	if (state->visible) {
 		p->pri.enabled = true;
 		p->pri.bytes_per_pixel =
-			crtc->primary->state->fb->bits_per_pixel / 8;
-	} else {
-		p->pri.enabled = false;
-		p->pri.bytes_per_pixel = 0;
+			drm_format_plane_cpp(state->base.fb->pixel_format, 0);
+		p->pri.horiz_pixels = drm_rect_width(&state->dst);
 	}
 
-	if (crtc->cursor->state->fb) {
+	state = to_intel_plane_state(crtc->cursor->state);
+	if (state->visible) {
 		p->cur.enabled = true;
-		p->cur.bytes_per_pixel = 4;
-	} else {
-		p->cur.enabled = false;
-		p->cur.bytes_per_pixel = 0;
+		p->cur.bytes_per_pixel =
+			drm_format_plane_cpp(state->base.fb->pixel_format, 0);
+		p->cur.horiz_pixels = state->base.crtc_w;
 	}
-	p->pri.horiz_pixels = intel_crtc->config->pipe_src_w;
-	p->cur.horiz_pixels = intel_crtc->base.cursor->state->crtc_w;
 
 	drm_for_each_legacy_plane(plane, &dev->mode_config.plane_list) {
 		struct intel_plane *intel_plane = to_intel_plane(plane);
-- 
2.0.5