[Intel-gfx] [PATCH v2 2/2] drm/i915/chv: Extend set idle rps wa to chv

[Ville Syrjälä]

On Fri, May 08, 2015 at 08:43:11PM +0530, deepak.s at linux.intel.com wrote:
> From: Deepak S <deepak.s at linux.intel.com>
> 
> It is obsered on BSW that requesting a new frequency from Punit
> does nothing when the GPU is in rc6, and if we let it enter rc6 with a
> high frequency Vnn also remains high.

I would perhaps rephrase that as "slightly higher than at the
minimum frequency" since it does drop most of the way, at least on
my BSW.

Otherwise this is
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>

> Extending vlv_set_rps_idle()
> workaround on CHV/BSW.
> 
> suggested-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
> Signed-off-by: Deepak S <deepak.s at linux.intel.com>
> ---
>  drivers/gpu/drm/i915/intel_pm.c | 7 -------
>  1 file changed, 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 3df929a..852f756 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4052,15 +4052,8 @@ static void valleyview_set_rps(struct drm_device *dev, u8 val)
>  */
>  static void vlv_set_rps_idle(struct drm_i915_private *dev_priv)
>  {
> -	struct drm_device *dev = dev_priv->dev;
>  	u32 val = dev_priv->rps.idle_freq;
>  
> -	/* CHV don't need to force the gfx clock */
> -	if (IS_CHERRYVIEW(dev)) {
> -		valleyview_set_rps(dev_priv->dev, val);
> -		return;
> -	}
> -
>  	if (dev_priv->rps.cur_freq <= val)
>  		return;
>  
> -- 
> 1.9.1

-- 
Ville Syrjälä
Intel OTC