[Intel-gfx] [PATCH v2] drm/i915/chv: Extend set idle rps wa to chv
deepak.s at linux.intel.com
deepak.s at linux.intel.com
Sat May 9 05:41:54 PDT 2015
From: Deepak S <deepak.s at linux.intel.com>
It is observed on BSW that requesting a new frequency from Punit
does nothing when the GPU is in rc6, and if we let GPU enter rc6
with a high frequency, Vnn remains slightly higher than at minimum
frequency. Extending vlv_set_rps_idle() workaround on CHV/BSW.
v2: Update commit msg (Ville)
suggested-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
Signed-off-by: Deepak S <deepak.s at linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 82dfdbc..064f11a 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4052,15 +4052,8 @@ static void valleyview_set_rps(struct drm_device *dev, u8 val)
*/
static void vlv_set_rps_idle(struct drm_i915_private *dev_priv)
{
- struct drm_device *dev = dev_priv->dev;
u32 val = dev_priv->rps.idle_freq;
- /* CHV don't need to force the gfx clock */
- if (IS_CHERRYVIEW(dev)) {
- valleyview_set_rps(dev_priv->dev, val);
- return;
- }
-
if (dev_priv->rps.cur_freq <= val)
return;
--
1.9.1
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