[Intel-gfx] [PATCH] drm/i915/bxt: Use intel_encoder->hpd_pin to check live status
Rodrigo Vivi
rodrigo.vivi at gmail.com
Fri Sep 11 11:00:43 PDT 2015
On Fri, Sep 11, 2015 at 4:40 AM Sonika Jindal <sonika.jindal at intel.com>
wrote:
> Using intel_encoder's hpd_pin to check the live status
> because of BXT A0/A1 WA for HPD pins and hpd_pin contains the
> updated pin for the corresponding port.
>
It makes sense, but is it always true? or we should have a fallback to
intel_dig_port->port in some case or in some stepping after A0/A1?
With this clarified feel free to use:
Reviewed-by: Rodrigo Vivi <rodrigo.vivi at intel.com>
>
> Signed-off-by: Sonika Jindal <sonika.jindal at intel.com>
> ---
> drivers/gpu/drm/i915/intel_dp.c | 9 ++++++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c
> b/drivers/gpu/drm/i915/intel_dp.c
> index 796f930..bf17030 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -4663,11 +4663,14 @@ static bool vlv_digital_port_connected(struct
> drm_i915_private *dev_priv,
> }
>
> static bool bxt_digital_port_connected(struct drm_i915_private *dev_priv,
> - struct intel_digital_port *port)
> + struct intel_digital_port
> *intel_dig_port)
> {
> + struct intel_encoder *intel_encoder = &intel_dig_port->base;
> + enum port port;
> u32 bit;
>
> - switch (port->port) {
> + intel_hpd_pin_to_port(intel_encoder->hpd_pin, &port);
> + switch (port) {
> case PORT_A:
> bit = BXT_DE_PORT_HP_DDIA;
> break;
> @@ -4678,7 +4681,7 @@ static bool bxt_digital_port_connected(struct
> drm_i915_private *dev_priv,
> bit = BXT_DE_PORT_HP_DDIC;
> break;
> default:
> - MISSING_CASE(port->port);
> + MISSING_CASE(port);
> return false;
> }
>
> --
> 1.7.10.4
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
>
-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://lists.freedesktop.org/archives/intel-gfx/attachments/20150911/6bd1c62b/attachment-0001.html>
More information about the Intel-gfx
mailing list