[Intel-gfx] [PATCH] drm/i915: Unify VLV/CHV DPOunit clock gating disable/enable
Tomi Sarvela
tomi.p.sarvela at intel.com
Wed Apr 27 15:06:30 UTC 2016
On Wednesday 27 April 2016 17:49:26 Ville Syrjälä wrote:
> On Mon, Apr 18, 2016 at 07:18:25PM +0300, ville.syrjala at linux.intel.com
wrote:
> > From: Ville Syrjälä <ville.syrjala at linux.intel.com>
> >
> > Check for VLV/CHV instead if !BXT when re-enabling DPOunit clock gating
> > after DSI disable. That's what we checked when disabling the clock
> > gating when enabling DSI.
> >
> > Also use the same temporary variable name in both cases, and toss in a
> > bit of dev vs. dev_priv cleanup while at it.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala at linux.intel.com>
>
> Anyone know why this wasn't picked up by the .fi CI?
Was tested, but posting had failed. Retried.
> Tomi?
Tomi
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