[Intel-gfx] [PATCH 2/2] drm/i915: re-use computed offset bias for context pin

[Chris Wilson]

On Fri, Dec 23, 2016 at 03:56:22PM -0800, daniele.ceraolospurio at intel.com wrote:
> From: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> 
> The context has to obey the same offset requirements as the ring,
> so we can re-use the same bias value we computed for the ring instead of
> unconditionally using GUC_WOPCM_TOP.
> 
> Suggested-by: Chris Wilson <chris at chris-wilson.co.uk>
> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio at intel.com>
> Cc: Chris Wilson <chris at chris-wilson.co.uk>

Both 
Reviewed-by: Chris Wilson <chris at chris-wilson.co.uk>

Applied and pushed. Thanks for digging in to find the root cause. We
could relax the 4096 offset for bdw+ I think, or maybe only gen6/gen7
had enough coverage in the wild to hit the hole.
-Chris

-- 
Chris Wilson, Intel Open Source Technology Centre