[Intel-gfx] [PATCH 7/7] drm/i915: GEM operations need to be done under the big lock

Tvrtko Ursulin tvrtko.ursulin at linux.intel.com
Wed Jan 13 04:46:39 PST 2016


On 11/01/16 16:56, Chris Wilson wrote:
> On Mon, Jan 11, 2016 at 05:36:46PM +0200, Ville Syrjälä wrote:
>> On Mon, Jan 11, 2016 at 03:16:16PM +0000, Tvrtko Ursulin wrote:
>>> Don't know, I leave this one to whoever grabbed the lock around
>>> intel_init_gt_powersave in the first place. Maybe there was a special
>>> reason.. after git blame od intel_display.c eventually completed, adding
>>> Imre and Ville to cc.
>>
>> Hmm. I don't recall the details anymore, but looking at the code pushing
>> the locking down to valleyview_setup_pctx() looks entirely reasonable to
>> me.
>
> iirc, this locking only exists to keep the WARN() at bay. But it is
> pedagogical, I guess.

Don't really know this area, but what about the 
intel_gen6_powersave_work->valleyview_enable_rps->valleyview_check_pctx 
which dereferences the dev_priv->vlv_pctx, which is set/cleared in 
valleyview_setup_pctx/valleyview_cleanup_pctx, which would now be 
outside both struct_mutex and the rps lock?

Regards,

Tvrtko


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